George Yashin Email & Phone Number

Hello, my name is George, I am a compact modeling engineer in Nexperia, my main area of interest is compact and TCAD device modeling.I have experience in:- Characterization device with compact models, mostly MOS models like, BSIM4, BSIMSOI4.5, HISIMSOI, HISIM-HV2. I have experience in 28nm, 65nm, 90nm, 180nm, 250 nm technology nodes, SOI and BiCMOS, also have experience in RF characterization of compact models.- Industry standard modeling tools like ICCAP (including PEL and Python scripting), MBP.- Creating test structures for DC, CV, RF and noise characterization.- TCAD modeling of semiconductor devices in Sentaurus TCAD (Synopsys, versions 2015-2021)- Statistical processing of experimental data with the further construction of statistical models of compact models of semiconductor devices.- Creating models of semiconductor devices on Verilog-A.- Programming using languages C/C++, Python (SciPy, NumPy, Matplotlib), Tcl.- Simulation of circuits in various SPICE-simulators (easily read and write netlists), for example, Spectre from Cadence. I worked in Cadence environment, both schematic and layout tools, also familiar with ADS (Keysight) - used for RF creating and verification compact models.- Development of new designs and technologies of devices, including LDMOS transistors for high-voltage and high-temperature applications using TCAD.- Development of topology of semiconductor structures, participated in the development of test crystals using 90CMOS, 180CMOS, 250SOI technologies.