Senior Research Scientist
Eindhoven Area, Netherlands
Design, layout and measurement of Radio-Frequency (RF) circuits (in a SiGe process) for multi-band Ultra Wide Band systems, aiming at large data-rate wireless communication at short distances. Challenges are the large signal band (528MHz wide channels), the high local oscillator (LO) frequencies (3-5GHz) with good spectral purity, fast hopping between channels, low noise figure and immunity to large interferer systems. This was a multi-site project, in close cooperation with several Philips groups.Design, layout and measurement of CMOS circuits with a high timing accuracy (crystal oscillator, PLL with LC oscillator, digital counter) for application in low-rate (1Mb/s) Ultra Wide Band systems based on pulse positioning of ultra-narrow pulses.Design, layout and measurement of high-speed CMOS sigma-delta ADC's, aiming to find out themaximum usable sampling frequency (up to 1GHz). Challenges are sampling clock jitter, waveform asymmetry of feedback DAC pulses, and minimizing loop time delays.Design, layout and measurement of a high-speed (co)-processor in a sector-wide project (sector IC Design of Philips Research Eindhoven). Goal was to find the optimal way of designing digital circuits running well above 2GHz, both using standard cell libraries and custom made digital cells.Design, layout and measurement of a switched-capacitor channel filter for teletext applications. Thefilter enhanced the signal frequency band around 1.5MHz and compensated for channel loss.Design, layout and measurement of a teletext front-end, consisting of a differential variable gain amplifier and a differential 7-bit two-step Analog-to-Digital Converter. Main challenges were power and area reduction, and the fully differential approach.