Gerard Van Der Weide
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Gerard Van Der Weide Email & Phone Number

owner; top-level chip integration: design lead, consultancy and support at Unific
Location: Eindhoven, North Brabant, Netherlands 3 work roles 2 schools
1 work email found @nxp.com 1 phone found area 800 LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 1 phone

Work email g****@nxp.com
Direct phone (800) ***-****
LinkedIn Profile matched
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Current company
Role
owner; top-level chip integration: design lead, consultancy and support
Location
Eindhoven, North Brabant, Netherlands
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Quick answer

Gerard Van Der Weide is listed as owner; top-level chip integration: design lead, consultancy and support at Unific, a with 24 employees, based in Eindhoven, North Brabant, Netherlands. AeroLeads shows a work email signal at nxp.com, phone signal with area code 800, and a matched LinkedIn profile for Gerard Van Der Weide.

Gerard Van Der Weide previously worked as Integration Lead at Nxp Semiconductors and Senior Research Scientist at Philips Research. Gerard Van Der Weide holds Master’S Degree, Electrical And Electronics Engineering from University Of Twente.

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Email format at Unific

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*@nxp.com
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Profile bio

About Gerard Van Der Weide

I am a fast and accurate IC designer with more than 20 years background in analog and mixed-signal design. I have a strong affinity for top-level integration work, which allows me to exploit my strengths: unify IP blocks into an integrated circuit (IC), and unite people in a project.My efficient way-of-working, ability to run many things in parallel, combined with my interpersonal skills are a proven combination to achieve high-quality integrated solutions. I am always motivated and motivating others to go for a realistic deadline together, prepared to give that bit of extra if needed. Next to having a good overview of work tasks and assignments over team members, my people skills are a constructive binding factor, also during stressful periods.I consider myself a highly social, friendly and humorous person, always available to assist people, and to motivate by showing my positive attitude towards work and life.

Listed skills include Semiconductors, Ic, Integrated Circuit Design, Simulations, and 12 others.

Current workplace

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Unific
Unific
owner; top-level chip integration: design lead, consultancy and support
Akron, Ohio 44321, US
Website
Employees
24
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3 roles · 32 years

Gerard Van Der Weide work experience

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Owner; Top-Level Chip Integration: Design Lead, Consultancy And Support

Current

Eindhoven Area, Netherlands

Entrepreneur at my newly-formed company Unific, focusing at top-level IC design, with 20 years of background in analog and mixed-signal design.Interested? Please send me an e-mail at info@unific.nl.My brand new website has gone live! Check out all my activities @ Unific here:unific.nl

Jul 2015 - Present

Integration Lead

Eindhoven Area, Netherlands

76-81GHz Car Radar Integrated Transceiver IC in 40nm CMOS technology - integration lead, responsible for pinning definition, power plan, top-level schematic, floor-planning, top-level layout, physical verification and IO ring / ESD design- co-design of embedded wafer level ball grid array (eWLB) package with the IC, definition of PCB bump assignment, realisation of Re-Distribution Layer (RDL) design which connects the bumps to the IC using only one interconnect layer, while safeguarding interference isolation- main interface to the digital IP team for efficient communication and delivery of digital IP blocks- set-up and configuration of the DesignSync server, database managerDigital Audio Broadcasting (DAB) receiver supporting VHF-3 & L-Band in 65nm CMOS technology- integration lead, responsible for top-level schematic and layout, physical verification, chip-finishing and final sign-off, with a special focus on interference isolation issues- part of the technical core team- transfer to business line, off-loaded tasks (ESD design) from radio front-end integator- schematic review, floor-planning and layout parts in wideband ADC sub-IP60GHz receiver front-end for beam steering communication applications in 45nm CMOS technology- top-level integrator and ESD designDesign of an 11-bit 3.6GS/s time-interleaved SAR Analog-to-Digital Converter in a 65nm CMOS process- top-level integrator, responsible for top-level schematic and layout of the SAR ADC, its ESD design and complex layout of some high-performance sub-blocksDesign, layout and measurement of Radio-Frequency (RF) circuits in CMOS technologies for multi-band Ultra Wide Band systems, with applications in the field of wireless USB: a multi-site System-on-a-Chip integration project of a complete Ultra Wide Band PHY (physical layer)- integration lead of the radio front-end of this PHY, and interface person to the digital base-band and MAC teams

2007 - Jun 2015

Senior Research Scientist

Eindhoven Area, Netherlands

Design, layout and measurement of Radio-Frequency (RF) circuits (in a SiGe process) for multi-band Ultra Wide Band systems, aiming at large data-rate wireless communication at short distances. Challenges are the large signal band (528MHz wide channels), the high local oscillator (LO) frequencies (3-5GHz) with good spectral purity, fast hopping between channels, low noise figure and immunity to large interferer systems. This was a multi-site project, in close cooperation with several Philips groups.Design, layout and measurement of CMOS circuits with a high timing accuracy (crystal oscillator, PLL with LC oscillator, digital counter) for application in low-rate (1Mb/s) Ultra Wide Band systems based on pulse positioning of ultra-narrow pulses.Design, layout and measurement of high-speed CMOS sigma-delta ADC's, aiming to find out themaximum usable sampling frequency (up to 1GHz). Challenges are sampling clock jitter, waveform asymmetry of feedback DAC pulses, and minimizing loop time delays.Design, layout and measurement of a high-speed (co)-processor in a sector-wide project (sector IC Design of Philips Research Eindhoven). Goal was to find the optimal way of designing digital circuits running well above 2GHz, both using standard cell libraries and custom made digital cells.Design, layout and measurement of a switched-capacitor channel filter for teletext applications. Thefilter enhanced the signal frequency band around 1.5MHz and compensated for channel loss.Design, layout and measurement of a teletext front-end, consisting of a differential variable gain amplifier and a differential 7-bit two-step Analog-to-Digital Converter. Main challenges were power and area reduction, and the fully differential approach.

1995 - 2006 ~11 yrs
Team & coworkers

Colleagues at Unific

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2 education records

Gerard Van Der Weide education

High School, Vwo

Lambert Franckens College, Elburg
FAQ

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What company does Gerard Van Der Weide work for?

Gerard Van Der Weide works for Unific.

What is Gerard Van Der Weide's role at Unific?

Gerard Van Der Weide is listed as owner; top-level chip integration: design lead, consultancy and support at Unific.

What is Gerard Van Der Weide's email address?

AeroLeads has found 1 work email signal at @nxp.com for Gerard Van Der Weide at Unific.

What is Gerard Van Der Weide's phone number?

AeroLeads has found 1 phone signal(s) with area code 800 for Gerard Van Der Weide at Unific.

Where is Gerard Van Der Weide based?

Gerard Van Der Weide is based in Eindhoven, North Brabant, Netherlands while working with Unific.

What companies has Gerard Van Der Weide worked for?

Gerard Van Der Weide has worked for Unific, Nxp Semiconductors, and Philips Research.

Who are Gerard Van Der Weide's colleagues at Unific?

Gerard Van Der Weide's colleagues at Unific include João Afonso, Unific Agencia, Karine Florentino, Sandra Gudino, and Ify Christy.

How can I contact Gerard Van Der Weide?

You can use AeroLeads to view verified contact signals for Gerard Van Der Weide at Unific, including work email, phone, and LinkedIn data when available.

What schools did Gerard Van Der Weide attend?

Gerard Van Der Weide holds Master’S Degree, Electrical And Electronics Engineering from University Of Twente.

What skills is Gerard Van Der Weide known for?

Gerard Van Der Weide is listed with skills including Semiconductors, Ic, Integrated Circuit Design, Simulations, Cmos, Analog Circuit Design, Research, and R&D.

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