Won-Jong Lee Email & Phone Number

Santa Clara, Ca, Us

Santa Clara, California, Us

Served as a member of program/paper committees and a paper reviewer for various graphics journals and conferences such as ACM SIGGRAPH / SIGGRAPH Asia, EUROGRAPHICS, ACM/Eurographics High Performance Graphics, and ACM Transactions on Reconfigurable Technology and Systems.

Santa Clara, California, Us

- Proactively conducting several graphics research including ray tracing, hardware architecture, and machine learning aiming at Intel’s future graphics solutions and GPUs with cross-functional collaborators.- Leading a research project regarding a new programming model for modern ray/path tracing, called Traversal Shader. Gave a talk in SIGGRAPH Asia 2019/2020.▪ Traversal Shader: developed the proof-of-concept model for a new shader stage in a modern ray tracing pipeline that enables instance-level programmability during traversal on acceleration structures.▪ MPLB (Multi-Pass Lazy Build of acceleration structures): developed a visibility-driven on-demand BVH-build algorithm for modern ray tracing, which builds BLASes (Bottom-Level Acceleration Structures) for only required dynamic geometry in run-time by leveraging traversal shaders.

Suwon-Si, Gyeonggi-Do, Kr

Performed GPU architecture validation work in S-GPU project with several architects. Wrote architecture test plans and specifications for mobile GPU units including tessellators, vertex/hull/domain/geometry shaders, and some fixed-function hardware.

Suwon-Si, Gyeonggi-Do, Kr

- Continued to lead a research team to realize real-time ray tracing on mobile computing platforms. Expanded research scopes and developed several use cases to make the IPs close to being productized. Planned and managed internal and collaboration projects.▪ Developed advanced rendering algorithms and GPU architectures (hybrid ray tracing and rasterizer, deferred shading, screen-space ray tracing, and filtering/reprojection for VR).▪ Implemented a low-power ray tracing hardware at functional and RTL level, called T&I units 2.5, providing energy efficiency 2 times better than previous hardware (T&I unit 2.0).▪ Developed a new hardware architecture for accelerating the build of BVH trees. - Supervised team members, mentored their R&D works, and encouraged publishing. Wrote various research papers and technical reports as an author and co-author.- Managed a collaboration project with a European university to develop a fast BVH tree build algorithm for dynamic ray tracing on mobile CPUs.- Reinforced ongoing relationships with business units and coordinated between the management team and internal clients.

Suwon-Si, Gyeonggi-Do, Kr

- Built a research team from scratch. Recruited research scientists and engineers, set up multiple projects, defined roadmaps, created internal networks and established partnerships with leading research labs in academia through collaboration and multiple services of conference committees.- Starting with algorithm research in ray tracing, and expanded the scope of the team to broadly cover from low-level hardware architecture to high-level API ecosystem.- Led a team to successfully develop a ray tracing system called SGRT (Samsung GPU based on Ray Tracing) in two years. Coordinated several internal and external collaborators such as processor architecture groups, multimedia graphics lab, and universities.- Established relationships with SAMSUNG's several business units, resulting in multipledocumented IP transfers. - Communicated with leaders and engineers in multi-site organizations (Advanced Computing Lab, San Jose, and Samsung Research India, Bangalore) to discuss features of the next-generation GPUs and align with product roadmaps.- Managed several collaboration projects with academia: a heterogeneous ray tracing system and hardware accelerators, adaptive supersampling, and GPU-based global illumination.- Wrote and presented several technical papers on ray tracing hardware and software kernels at ACM High-Performance Graphics 2013, SIGGRAPH 2012/2013, SIGGRAPH Asia 2013/2014/2015.

Suwon-Si, Gyeonggi-Do, Kr

- Conducted research in a GPU project called SRPG which is a new proof-of-concept architecture based on Samsung Reconfigurable Processors (SRP).▪ Customized a graphics API compatible OpenGL|ES 2.x and implemented shader kernels (graphics and compute) with stream programming models for data-parallel embedded DSP processors.▪ Conducted performance optimization/tuning by maximizing parallelism at task-/data-level (multi-core, S/W pipelining and own SIMD intrinsic).▪ Developed a load balancing scheme to schedule graphics shader kernels (vertex and pixel) and orchestrated fixed-function hardware in multi-core mobile GPUs based on SRPs.▪ Wrote and presented abstract papers (posters) of the SRPG architectures and task scheduling schemes at ACM High Performance Graphics 2011/2012.

Seodaemun-Gu, Seoul, Kr

▪ Research on embedded system for next-generation intelligent devices 12/2004 –11/2005(supported by National IT Industry Promotion Agency, Korea) ▪ Next generation internet-based location intelligent computing 3/2003 – 2/2004(supported by Korea Research Foundation, Korea) - Responsible for adaptive rendering schemes for sort-last parallel volume rendering. ▪ Research on interactive 3D data visualization 9/2003 – 8/2004(supported by National IT Industry Promotion Agency, Korea) - Responsible for bandwidth effective volume rendering schemes on GPUs.▪ Designing parallel rendering accelerators for scalable displays 10/2001 – 9/2002(supported by Korea Research Foundation, Korea) - Responsible for bandwidth effective parallel rendering algorithms. ▪ Designing high-performance 3D graphics accelerators for realistic images 9/1999 – 8/2004(National Research Lab. Project supported by Ministry of Science and Technology, Korea) - Responsible for volume rendering and distributed parallel rendering algorithms.- Responsible for dedicated hardware simulators and OpenGL/GLSL applications for bump and displacement mapping. - Responsible for 3D graphics hardware pipeline simulators including geometry units, rasterizers, texture units, and raster operators

Seodaemun-Gu, Seoul, Kr

- CS Winter Special OpenGL Graphics Programming (Winter 2005)- DR001 C/C++ Programming (Summer 2005)- DR001 C/C++ Programming (Spring 2005)- UJ158 C++ Programming (Fall 2004)- SZ503 Computer System (Educational Graduated School, Spring 2003)- UJ158 C++ Programming (Summer 2002)- DR001 C/C++ Programming (Spring 2002)- DS008 Software Practice (Fall 2001)

Suwon-Si, Gyeonggi-Do, Kr

▪ Designing next-generation low-power mobile 3D graphics hardware (3/2005 – 2/2006)(supported by SAMSUNG Advanced Institute of Technology, Korea) ▪ Designing high-performance 3D accelerator for next generation mobile phones (8/2003 – 7/2004) (supported by SAMSUNG Electronics Digital Media, Korea) ▪ Designing 3D graphics processor for mobile devices (4/2002 – 9/2003) (supported by SAMSUNG Electronics Telecommunication & Networks, Korea)

Tsukuba, Ibaraki, Jp

- Worked on interactive visualization for large-scale & time-varying volume dataset on VG-cluster which is GPU cluster system equipped with image compositing hardware manufactured by Mitsubishi Precision, Co. Ltd. (with Dr. Shigeru Muraki)

Conducted a role of mainframe operator/programmer developing a database system dealing with supply resources and materials in the infantry during my mandatory military service in South Korea.

Ph.D., Computer Science

M.S, Computer Science

B.S, Computer Science & Engineering