Won-Jong Lee Email & Phone Number
@intel.com
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Who is Won-Jong Lee? Overview
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Won-Jong Lee is listed as Principal Graphics Hardware Architect at NVIDIA, a company with 41500 employees, based in Santa Clara, California, United States. AeroLeads shows a work email signal at intel.com and a matched LinkedIn profile for Won-Jong Lee.
Won-Jong Lee previously worked as Principal GPU Architect at Amd and Committee Member at Siggraph, Siggraph Asia, Eurographics, Hpg. Won-Jong Lee holds Ph.D., Computer Science from Yonsei University.
Email format at NVIDIA
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AeroLeads found 1 current-domain work email signal for Won-Jong Lee. Compare company email patterns before reaching out.
About Won-Jong Lee
I'm a Principal GPU Architect at AMD. My work mainly focuses on graphics hardware architecture / GPUs / ray tracing / real-time rendering. Before joining AMD, I had worked on various aspects of graphics algorithm/architecture, visualization, parallel rendering, and ray tracing hardware at Yonsei University, National Institute of Advanced Industrial Science and Technology (AIST, Tokyo), Samsung, and Intel.I have written +47 technical papers and +63 patent applications filed for my research periods as an author and co-author.Specialties: - Graphics architecture and hardware algorithm - Architecture modeling and exploration- Simulation framework (cycle accurate / trace-driven / functional )- Rendering acceleration, parallelization and load balancing- Advanced rendering algorithm (ray tracing, volume rendering, global illumination)
Listed skills include Algorithms, Opengl, Fpga, C++, and 27 others.
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Won-Jong Lee work experience
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Principal Gpu Architect
CurrentCommittee Member
CurrentServed as a member of program/paper committees and a paper reviewer for various graphics journals and conferences such as ACM SIGGRAPH / SIGGRAPH Asia, EUROGRAPHICS, ACM/Eurographics High Performance Graphics, and ACM Transactions on Reconfigurable Technology and Systems.
Research Scientist
- Proactively conducting several graphics research including ray tracing, hardware architecture, and machine learning aiming at Intel’s future graphics solutions and GPUs with cross-functional collaborators.- Leading a.
- Traversal Shader: developed the proof-of-concept model for a new shader stage in a modern ray tracing pipeline that enables instance-level programmability during traversal on acceleration structures.
- MPLB (Multi-Pass Lazy Build of acceleration structures): developed a visibility-driven on-demand BVH-build algorithm for modern ray tracing, which builds BLASes (Bottom-Level Acceleration Structures) for only required.
Principal Engineer
Performed GPU architecture validation work in S-GPU project with several architects. Wrote architecture test plans and specifications for mobile GPU units including tessellators, vertex/hull/domain/geometry shaders, and some fixed-function hardware.
Principal Research Scientist, Team Lead
- Continued to lead a research team to realize real-time ray tracing on mobile computing platforms. Expanded research scopes and developed several use cases to make the IPs close to being productized. Planned and managed.
- Developed advanced rendering algorithms and GPU architectures (hybrid ray tracing and rasterizer, deferred shading, screen-space ray tracing, and filtering/reprojection for VR).
- Implemented a low-power ray tracing hardware at functional and RTL level, called T&I units 2.5, providing energy efficiency 2 times better than previous hardware (T&I unit 2.0).
- Developed a new hardware architecture for accelerating the build of BVH trees. - Supervised team members, mentored their R&D works, and encouraged publishing. Wrote various research papers and technical reports as an.
Senior Research Scientist, Team Lead
- Built a research team from scratch. Recruited research scientists and engineers, set up multiple projects, defined roadmaps, created internal networks and established partnerships with leading research labs in academia through collaboration and multiple services of conference committees.- Starting with algorithm research in ray tracing, and expanded the.
Senior Research Scientist
- Conducted research in a GPU project called SRPG which is a new proof-of-concept architecture based on Samsung Reconfigurable Processors (SRP).
- Customized a graphics API compatible OpenGL|ES 2.x and implemented shader kernels (graphics and compute) with stream programming models for data-parallel embedded DSP processors.
- Conducted performance optimization/tuning by maximizing parallelism at task-/data-level (multi-core, S/W pipelining and own SIMD intrinsic).
- Developed a load balancing scheme to schedule graphics shader kernels (vertex and pixel) and orchestrated fixed-function hardware in multi-core mobile GPUs based on SRPs.
- Wrote and presented abstract papers (posters) of the SRPG architectures and task scheduling schemes at ACM High Performance Graphics 2011/2012.
Research Assistant
- Research on embedded system for next-generation intelligent devices 12/2004 –11/2005(supported by National IT Industry Promotion Agency, Korea)
- Next generation internet-based location intelligent computing 3/2003 – 2/2004(supported by Korea Research Foundation, Korea) - Responsible for adaptive rendering schemes for sort-last parallel volume rendering.
- Research on interactive 3D data visualization 9/2003 – 8/2004(supported by National IT Industry Promotion Agency, Korea) - Responsible for bandwidth effective volume rendering schemes on GPUs.
- Designing parallel rendering accelerators for scalable displays 10/2001 – 9/2002(supported by Korea Research Foundation, Korea) - Responsible for bandwidth effective parallel rendering algorithms.
- Designing high-performance 3D graphics accelerators for realistic images 9/1999 – 8/2004(National Research Lab. Project supported by Ministry of Science and Technology, Korea) - Responsible for volume rendering and.
Lecturer
- CS Winter Special OpenGL Graphics Programming (Winter 2005)- DR001 C/C++ Programming (Summer 2005)- DR001 C/C++ Programming (Spring 2005)- UJ158 C++ Programming (Fall 2004)- SZ503 Computer System (Educational Graduated School, Spring 2003)- UJ158 C++ Programming (Summer 2002)- DR001 C/C++ Programming (Spring 2002)- DS008 Software Practice (Fall 2001)
Co-Op Engineer
- Designing next-generation low-power mobile 3D graphics hardware (3/2005 – 2/2006)(supported by SAMSUNG Advanced Institute of Technology, Korea)
- Designing high-performance 3D accelerator for next generation mobile phones (8/2003 – 7/2004) (supported by SAMSUNG Electronics Digital Media, Korea)
- Designing 3D graphics processor for mobile devices (4/2002 – 9/2003) (supported by SAMSUNG Electronics Telecommunication & Networks, Korea)
Visiting Researcher
- Worked on interactive visualization for large-scale & time-varying volume dataset on VG-cluster which is GPU cluster system equipped with image compositing hardware manufactured by Mitsubishi Precision, Co. Ltd. (with Dr. Shigeru Muraki)
Computer Programmer, Sergeant
Conducted a role of mainframe operator/programmer developing a database system dealing with supply resources and materials in the infantry during my mandatory military service in South Korea.
Colleagues at NVIDIA
Other employees you can reach at nvidia.com. View company contacts for 41500 employees →
Kalyan Sreenivas R G
Colleague at NvidiaSanta Clara, California, United States, United States
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JL
Junhong Liu
Colleague at NvidiaHaidian District, Beijing, China, China
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BC
Bowen Cheng
Colleague at NvidiaNew Taipei City, New Taipei City, Taiwan, Taiwan, Province Of China
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BM
Barak Messica
Colleague at NvidiaHaifa, Haifa District, Israel, Israel
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SK
Sidney Knowles
Colleague at NvidiaCampbell, California, United States, United States
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KT
Kenny Tang
Colleague at NvidiaSan Jose, California, United States, United States
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EH
Elad Haimovich
Colleague at NvidiaHaifa District, Israel, Israel
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AV
Abhinaya Viswanathan
Colleague at NvidiaSanta Clara, California, United States, United States
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VP
Vibha Pandurangi
Colleague at NvidiaSan Francisco, California, United States, United States
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SF
Sun Frezi
Colleague at NvidiaRishon Lezion, Center District, Israel, Israel
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Won-Jong Lee education
Ph.D., Computer Science
M.S, Computer Science
B.S, Computer Science & Engineering
Frequently asked questions about Won-Jong Lee
Quick answers generated from the profile data available on this page.
What company does Won-Jong Lee work for?
Won-Jong Lee works for NVIDIA.
What is Won-Jong Lee's role at NVIDIA?
Won-Jong Lee is listed as Principal Graphics Hardware Architect at NVIDIA.
What is Won-Jong Lee's email address?
AeroLeads has found 1 work email signal at @intel.com for Won-Jong Lee at NVIDIA.
Where is Won-Jong Lee based?
Won-Jong Lee is based in Santa Clara, California, United States while working with NVIDIA.
What companies has Won-Jong Lee worked for?
Won-Jong Lee has worked for Nvidia, Amd, Siggraph, Siggraph Asia, Eurographics, Hpg, Intel Corporation, and Samsung Electronics.
Who are Won-Jong Lee's colleagues at NVIDIA?
Won-Jong Lee's colleagues at NVIDIA include Kalyan Sreenivas R G, Junhong Liu, Bowen Cheng, Barak Messica, and Sidney Knowles.
How can I contact Won-Jong Lee?
You can use AeroLeads to view verified contact signals for Won-Jong Lee at NVIDIA, including work email, phone, and LinkedIn data when available.
What schools did Won-Jong Lee attend?
Won-Jong Lee holds Ph.D., Computer Science from Yonsei University.
What skills is Won-Jong Lee known for?
Won-Jong Lee is listed with skills including Algorithms, Opengl, Fpga, C++, Computer Architecture, Embedded Systems, Parallel Computing, and Programming.
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