Low Power Design Verilog Soc Static Timing Analysis C Asic Microelectronics Rtl Design Integrated Circuit Design Cmos Ic Primetime Timing Closure Hardware Description Language Ncsim Power Management Rtl Coding Microcontrollers Upf Digital Implementation Flow Formal Verification English Architecture Design Research Teamwork Hdl Languages Multicultural Teams Funded Projects Front End Hw Synthesis Flow Public Speaking Teaching Telecommunications R System On A Chip Application Specific Integrated Circuits Integrated Circuits Vhdl