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Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Open Verification Methodology (OVM) , UVM Universal Verification Methodology (UVM), Object oriented languages such as C++ , System Verilog , Scripting languages such as Perl.
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Member Of Technical StaffAmd Apr 2020 - PresentSanta Clara, California, Us -
Design Verification EngineerIntel Corporation Nov 2014 - Apr 2020Santa Clara, California, Us -
Hardware Engineer InternAvailink Oct 2013 - Apr 2014Germantown, Md, Us• Worked on the verification of the Demodulator and SOC of AVAILINK’s next generation Set Top Modules for DVB-T and DVB-S standards• Ported firmware from an older SOC platform to a newer platform of the Set Top SOC• Implemented and run simulations to test the Demodulator and SOC in varying background noise such as AWGN, Echos and Random noise using the DVBS/S2/T standards• Currently working on emulating the Demodulator and SOC designs on Altera FPGAs • Creating and running test Regressions scripts to validate the performance of the designs on the FPGAs• Improving the current test Regressions scripts to facilitate more number of features and options when performing tests -
Post Silicon Dv InternNvidia May 2013 - Aug 2013Santa Clara, Ca, Us• Worked on the Bring up of One of NVIDIAs latest processors/GPUs for the 2014 Notebook SoC Platforms• Performed basic checks on buses, timers, fans , Memory reads , writes , Voltage checks and Feature checks• Designed, Implemented and run tests to measure the power dissipated in the new power saver modes of the GPU• Implemented tests to verify the Functional correctness of the sequence of events involved in entering and exiting power save mode -
Research AssistantUniversity Of Maryland Nov 2012 - Apr 2013College Park, Md, UsWorked on a research experiment aimed at slowing down the rate at which silver tarnishes thereby enhancing their surface glow. Work included extracting high resolution images from a Canon DSLR camera and performing image processing analysis on the extracted images to find out the degree of tarnish between differently coated samples -
StudentIiit Hyderabad 2008 - 2012Hyderabad , Telangana, In -
StudentIiit Hyderabad 2008 - 2012Hyderabad , Telangana, In -
Research InternshipNational University Of Singapore May 2011 - Aug 2011Singapore, Sg• Developed an Embedded Touch Wall using the Texas Instruments Beagle Board.• Implemented six gesture recognition based events for controlling events such as mouse clicks and pointer motion.• Published the work in the International Journal of Information and Education Technology
Gowtham P Skills
Gowtham P Education Details
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Berklee College Of MusicMusic Theory And Composition And Production -
University Of MarylandComputer Engineering -
International Institute Of Information Technology Hyderabad (Iiith)Computer Engineering
Frequently Asked Questions about Gowtham P
What company does Gowtham P work for?
Gowtham P works for Amd
What is Gowtham P's role at the current company?
Gowtham P's current role is Design Verification Engineer at AMD.
What is Gowtham P's email address?
Gowtham P's email address is nv****@****ail.com
What schools did Gowtham P attend?
Gowtham P attended Berklee College Of Music, University Of Maryland, International Institute Of Information Technology Hyderabad (Iiith).
What are some of Gowtham P's interests?
Gowtham P has interest in Especially Guitar, New Technologies And Music.
What skills is Gowtham P known for?
Gowtham P has skills like Asic, Verilog, C, C++, Embedded Systems, Vlsi, Fpga, Microcontrollers, Cadence, Image Processing, Algorithms, Matlab.
Who are Gowtham P's colleagues?
Gowtham P's colleagues are Shivang Shastri, Xiaoli Li, Apurva Modak, Jithendra Kasuba, Nilanjan Guha, Ruchitya Tejaswini Anand, Steve Galvan.
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