Andreas Graefe Email & Phone Number

Munich Area, Germany

Design expert for designing secure IPs for automotive applications. Main focus is the secure implementation of cryptographic accelerators and sub modules for Hardware Secure Modules (HSMs) fulfilling both security and safety requirements in next generation of automotive MCUs.

Munich Area, Germany

Design Lead in an SoC development team responsible for leading the top-level integration and physical implementation of new ChipCard and security controllers. In this role I'm also responsible for defining implementation concepts for clocking, reset, scan, power switching and advanced SoC-wide security functions.

RTL design in VHDL of lowpower highsecurity CPU-Cores for Infineon's SLE70 & SLE90 chipcard platform and other Security ICs. Integration of Cortex-M3, SC300 ARM Cores into Chipcard- and Security Circuits.RTL design in VHDL of a secure implementation of an AES crypto engine.Synthesis and trial floorplanning / backend tasks for timing-, area- & power estimation and verification of security measures for Chipcard CPU-Cores with Magma Talus / Synopsys DC.

RTL-Design of a DMA-Unit for a multicore Network-Processor-SOC. Top-Level-Integration and minor design topics.

Diploma thesis about modelling a Gigabit Ethernet MAC and implementing it in VHDL. Developing a concept for a software-based I/O-Controller supporting standards as PCIe, Hypertransport and GbE. Prove of concept by designing a software-based 1000Base-X Ethernet controller with implemenation in a Xilinx-FPGA development board.

Designing a circuit and PCB for measuring the efficiency of DC/DC-controllers.