Senior Electrical Engineer with extensive experience in creating semiconductor manufacturing solutions. Leverages a background in complex problem solving and project planning to successfully achieve yield, quality, and reliability goals. Develops successful teams and collaboration, enabling technical growth while driving optimal business solutions.
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Nand/Nor Process Integration EngineerMicron Technology Mar 2019 - Feb 2023Manassas, Virginia, United StatesNAND/NOR Process IntegrationResponsible for CMOS support for 3 FLASH and 1 NOR technology nodes, focus on NOR Automotive capability in last 2 years• Author and co-author on two internal papers regarding process and design improvements to allow for tightening automotive requirements on legacy parts• Key contributor to setup and execution of change business process for addition of Backend tests to Fab test flow• Business process owner for Global Parametric Monitoring System for the Manassas site. Key contributor to Global Parametric Monitoring System change requirements, testing and deployment of new solutions. -
Dram Process Integration EngineerMicron Technology Jan 2018 - Feb 2019Manassas, Virginia, United StatesResponsible for transfer of DRAM CMOS and FEOL technology• Successfully transferred CMOS solution for 4 DRAM designs from Taiwan and 1 design from Japan to Manassas • Empowered CMOS sustaining engineer with recommendations for evaluations and specification changes for the most recent design• Transformed static refresh performance from failing spec to Micron best in class for the technology node
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Nand/Nor Process Integration EngineerMicron Technology Jan 2016 - Jun 2018Manassas, Virginia, United StatesResponsible for transfer of NAND Process flow and CMOS technology• Successfully transferred process flow and CMOS solution for 5 NAND designs from from Singapore to Manassas.• Coordinated PI deliverables for New Part Introduction (NPI) and qualification of all design IDs• Coordinated Manassas FLASH yield predictions and updates to the global business process• CMOS support for High Volume Manufacturing (HVM) – process centering, monitoring and improvements – process equipment qualifications
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Nand Process Integration EngineerMicron Technology Jan 2012 - Jan 2016Manassas, Virginia, United StatesResponsible for transfer of Process flow, FEOL, MOL and CMOS technology of 5 NAND designs from Lehi, UT to Manassas• Successfully transferred process flow and CMOS solution for 5 NAND designs from from Singapore to Manassas.• Coordinated PI deliverables for New Part Introduction (NPI) and qualification of all design IDs• CMOS support for High Volume Manufacturing (HVM) – process centering, monitoring and improvements – process equipment qualifications
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Nand Process Integration EngineerMicron Technology Nov 2008 - Sep 2012Manassas, Virginia, United StatesResponsible for CMOS technology on 300mm NAND• Reduced NAND mask count by two by combining multiple implants on one masking step• Delivered first 300mm site to site parametric benchmarking and monitoring• CMOS support for High Volume Manufacturing (HVM) – process centering, monitoring and improvements – process equipment qualifications
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Fab Central Teams EngineerMicron Technology Oct 2006 - Dec 2008Manassas, Virginia, United StatesPrimarily responsible for software solutions for large deviations and change• Delivered system requirements for Global 8 Discipline (G8D) software solution for large deviations. Responsible for ensuring one solution across Wafer Fabrication and Assembly/Test organizations.• Assisted in definition and coordination of Global Change Process (GCP) for wafer fabrication facilities• Assisted FLASH param alignment activity to the Intel-Micron Flash Technology Joint Venture partner.
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Senior EngineerMicron Technology May 1989 - Sep 2006Boise, Idaho, United StatesAdditional Relevant Experience• Manufacturing Technology Advancement Group• Advanced Device Team – DRAM Transistor Lead• DRAM Transistor and MOL Module Owner• R&D DRAM Process Integration• DRAM Product Engineering• Over 50 patents on semiconductor process and circuits
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Graduate Research AssistantUniversity Of Missouri-Columbia 1988 - 1989Columbia, Missouri, United StatesPerformed Deep Level Transient Spectroscopy (DLTS) to evaluate the following deep level trapso Carbon interstitial and substitutional defects in irradiated Si – resulted in paper o Uniaxial stress effect on the DX center in irradiated Al-GaAs — collaborated on presentation for IPS conference Used equipment existing in lab to set up a second digital DLTS system, doubling analysis capability of the labCoordinated with the machine shop to spec and build a chamber to evaluate Single Event Upset (SEU) on DRAMS -
Undergraduate Research AssistantUniversity Of Missouri-Columbia May 1985 - Aug 1985Columbia, Missouri, United StatesAssisted Doctoral students to pull gamma source from reactor and load into collimator, maintain LN2 in germanium detector, alignment of crystals and data collection/plotting.Highlight was testing Mercuric Cadmium Telluride grown on the Space Shuttle versus terrestrial grown.
Greg Wald Education Details
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Master Of Science - Ms, Electrical Engineering
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Bachelor Of Science - Bs, Electrical Engineering
Frequently Asked Questions about Greg Wald
What is Greg Wald's role at the current company?
Greg Wald's current role is Senior Semiconductor Engineer | Process Integration | CMOS Device | Semiconductor Device Characterization | FEOL | NPI | JMP | Communication and Collaboration | Group Problem Solving | Data Mining | JMP.
What schools did Greg Wald attend?
Greg Wald attended University Of Missouri-Columbia, University Of Missouri-Columbia.
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