Process Engineer
Yorktown Heights, Ny
Worked as a process engineer in the Microelectronics Research Laboratory (MRL) at IBM's T. J. Watson Research Center, the heart of IBM research and development. Worked in the following areas:Technology14 nm/10 nm CMOS: Si, SiGe, and Ge FinFET, Si nanowire GAAFET , III-V CMOSMemory: Phase Change Memory, MRAMThin Films- Thin film Chemical Vapor Deposition (CVD) - LPCVD, PECVD, RTCVD - Developed novel in-situ (phosphorous/boron) doped Si and SiGe epitaxy process. - Developed novel low temperature Ge and strained/relaxed SiGe epitaxy process.- Characterization using ellipsometry, SEM, SIMS, XRD, defect etching and sheet resistance measurement.Lithography- MUV, 248 nm, and 193 nm lithography and metrology techniques.Advanced CleansChemical Mechanical Planarization (CMP)- Front-End-Of-the-Line (FEOL) CMP processes.