Peter Boyle Email & Phone Number

Mountain View, Ca, Us

Koto-Ku, Toyosu, Tokyo, Jp

Scottsdale, Arizona, Us

On acquired Fairchild in September 2016Key Accomplishments: - Member of leadership team that took the Cloud Power Solutions business unit from start up to >$50M/yr revenue over 3 years - Built a team from 0 to 14 with direct reports on 3 continents in a variety of roles - Ramped manufacturing from NPI to >2 million units per week of a complex multi-chip-module - Drove continuous cost improvement activities to achieve gross margin >10% better than peer business unitsProduct and Test Engineering - Lead international team of engineers responsible for NPI and long term product sustaining - Responsible for product supply, cost and quality - Develop test solutions and hardware - Part release to production - reliability testing, characterization, etc. - Resolve quality incidents Program Management - Manage product NPI process from marketing concept to released product - Develop and manage project schedules, budgets and ROI - Aligned business unit practices to corporate requirementsApplications - Perform validation for NPI - Develop evaluation boards and design guidelines - Create customer collateral (datasheets, app notes, etc.) - Provide customer support as needed

Phoenix, Arizona, Us

• Lead 20nm product rollouts, including new product introduction • Represent Operations, Product Engineering, Test Engineering, & Packaging Engineering at the corporate level in cross functional planning & execution• Provide updates on project status & technical issues across all levels of management• Define binning & part number plan to minimize inventory build-up while maximizing revenue• Drive manufacturing planning, including rollout scheduling, wafer lot starts, & risk mitigation• Project functional & performance yields• Supervise a team of 11 engineers & managers responsible for electrical failure analysis, yield improvement, manufacturing test limits, power model characterization, wafer sort & final test lot movement, manufacturing infrastructure setup, & device bring up & debug• Steer 20nm DFx activities (DFT, DFM, DFC)

• Senior Manager (2010 - 2012)• Manager (2006 - 2010)• Supervisor (2004 - 2006)• Led a team of 6 to 10 engineers responsible for signal/power integrity, external memory interfaces (DDR, QDR, etc.), IO, PLL validation, specification, debug, enhancement & PCB design• Reduced PCB development costs by 25% through improved process, vendor selection, consolidating requirements & purchasing, & improved BOM management• Drove improvements in chip level PDN design through improved measurement techniques & translation of PDN noise to timing noise impacts• Identified critical PDN design issue prior to tape out & drove resolution in early Si• Directed university collaboration on rapid dynamic current consumption estimation & on-die PDN noise• Managed engineering lab, including equipment specification, procurement, budgeting, & setting policies • Steered internal validation automation software & hardware platforms development• Developed uniform employee ranking system & Product Engineering specific expectations vs. title chart • Provided support for critical customer issues as needed

• Led a team of 3 engineers responsible for 130nm products' embedded memory & DSP block (MAC) validation, specification, debug, enhancement, & PCB design• Worked collaboratively on validation, specification, debug, enhancement, & PCB design for Excalibur SoC, including uC, bus, memory interfaces, & UART

• Advanced Product Engineer (2000 - 2002)• Product Engineer (1999 - 2000)• Worked on Altera APEX 20K line bring up, roll out, yield enhancement, & production support• Transferred wafer sort & unit final test from local Altera engineering facility to 3rd party sites

Atlanta, Ga, Us

• Developed, built, & installed factory control systems, including hardware, software & GUI for operator control for various clients, including Toyota, GM, & Fieldcrest-Cannon• Worked closely with customers, vendors, & contractors to ensure on-time system build & installation