Haibo Li

Haibo Li Email and Phone Number

Principal Engineer at Samsung Semiconductor Inc. @ Samsung Semiconductor
Cupertino, CA, US
Haibo Li's Location
Cupertino, California, United States, United States
Haibo Li's Contact Details

Haibo Li work email

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About Haibo Li

Technical leader and expert in NAND flash memory technology and SSD media technology.Highly self-motivated and experienced engineer and manager with solid and broad background in semiconductor device physics, 2D/3D NAND flash memory technology and SSD technology.20 years’ industrial experience in transistor-level, array-level and system-level device characterization, optimization, failure analysis, modeling, reliability testing, product development and qualification.Team and program/product management experience with proven strong leadership and excellent management, organizational and communication skills.Publications include 45+ issued/pending US/international patents, 20+ peer-reviewed journal, book chapter, and conference papers (https://scholar.google.com/citations?user=rkGjZ30AAAAJ&hl=en).

Haibo Li's Current Company Details
Samsung Semiconductor

Samsung Semiconductor

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Principal Engineer at Samsung Semiconductor Inc.
Cupertino, CA, US
Employees:
9609
Haibo Li Work Experience Details
  • Samsung Semiconductor
    Samsung Semiconductor
    Cupertino, Ca, Us
  • Samsung Semiconductor
    Principal Engineer
    Samsung Semiconductor Apr 2023 - Present
    • Field Application Engineering, Product Planning and Business Enabling.• Technical support for 3D NAND component sales and manage multiple accounts of customers who build flash solution (i.e., SSD, mobile and client applications).• Identify all flash business opportunities and provide optimal NAND Flash technologies and solutions for future designs for the specific assigned accounts, and managing all technical related issues.• Customer qualification management with technical documents and samples.• Technology, specific application type, market demand/sector, lifecycle, global qualification activities, and technical data in order to secure maximum design-wins• Future product planning discussion and alignment in new demand opportunity.• Manage the customers to assure that a technology leadership is maintained and sales are enabled and maximized. Act as an escalation path on occasions where there are (internal or external) obstacles impeding key design wins.• Provide strategic input to Korea HQ regarding the Flash solution or application technology trend in order to create new product offerings or to improve the R&R and the strategic partnership with the customers.• Visit and interact directly with the customers to maintain customer product roadmap updates. Track and report project details, design-in and qualifications plan as well as the competitive analysis in roadmap, process technology and qualification status.
  • Micron Technology
    Sr. Manager, System Integration Lead
    Micron Technology May 2021 - Feb 2023
    Boise, Idaho, Us
    • 3D NAND and SSD system technical integration and product lifecycle management.• Manage technical inputs and drive 3D NAND and SSD system alignment in the Success Criteria Document (SCD).• Work together with Media Architecture Group (MAG), System Architecture (SA), Business Units (BU), Application Engineering (App) and Technology Development (TD) team to resolve any gaps between NAND commits and system requirements.• Represent NAND team in System Product Development Teams (PDT) and collaborate about changes required to achieve competitive systems.• Manage NAND milestone and sample delivery schedules, in sync with system development timeline, provide system development teams with relevant documentation, and drive meetings to garner approval from stakeholders.• Communicate proper priorities within NAND development team to maintain focus on achieving system specs and highlight concerns to both Component and System teams for any issues, and drive the technical issue resolutions.• Manage communication with system teams regarding any NAND (Engineering Sampling) ES / (Qualification Release) QR capability issues. Assist with risk assessment and resolution for any identified issues.• Summarize key technical issues and present team progress, achievements and challenges to upper management.• Work closely with pathfinding team members to stay on the technology frontier, have internal technical publications and patent applications.
  • Yangtze Memory Technologies, Inc.
    Technical Director Of Product Device Engineering
    Yangtze Memory Technologies, Inc. Apr 2018 - Apr 2021
    Wuhan, Hubei, Cn
    • Built up the team of product device engineering and the 3D NAND characterization lab.• Provide training, guidance and mentoring to team members.• Responsible for developing 3D NAND operational algorithms and invention of new solutions for high performance, reliability, and power efficiency.• Developed advanced simulation platforms for novel operation schemes and virtual experiments.• Communicate and work closely with other teams: Design, Cell Device, Process, Reliability, Product and Test engineering, to deliver the innovative solutions to tackle challenging problems.• Led the team, participated and successfully developed 32-layer MLC, 64-layer TLC, 128-layer TLC/QLC 3D NAND products.• Team members earned YMTC Individual Excellence Awards (2018Q4, 2019Q1 and 2019Q2)• YMTC Team Excellence Award 2020Q3 for extraordinary technical contributions.• Serve as a member of patent committee.• Serve as a member of product path-finding team.
  • Sk Hynix Memory Solutions Inc.
    Principal Systems Engineer
    Sk Hynix Memory Solutions Inc. Dec 2013 - Apr 2018
    San Jose, Ca, Us
    • Section leader of SSD/NAND failure analysis• SSD failure analysis and characterization.• Develop FW tools for failure analysis.• Determine SSD/NAND testing and characterization methods.• Develop SSD/NAND flash endurance enhancement algorithms.• Develop SSD operation algorithms, i.e., background media scan, garbage collection, read reclaim policy, etc.• NAND threshold voltage distribution modeling for ECC simulations.
  • Western Digital
    Principal Engineer, Nand Specialist
    Western Digital May 2012 - Dec 2013
    San Jose, Ca, Us
    Enterprise SSD technology development including:• NAND specs, features, command sequences and qualification testing.• NAND characterization, optimization, and failure analysis for state-of-art SSD architecture.• Algorithm development for SSD endurance and reliability improvement.
  • Sandisk®
    Device Engineer, Sr. Device Engineer, Staff Device Engineer
    Sandisk® Aug 2006 - May 2012
    Milpitas, Ca, Us
    • NAND flash memory technology development over many technology nodes: 70nm, 56nm, 43nm, 32nm, 24nm, 1xnm and 3D NAND.• World’s first TLC (3 bits/cell) NAND flash memory technology development on 56nm node. • Novel BiCS (Bit-Cost-Scalable, 3D NAND) technology development.• Expert in NAND flash operations, device characterization, parameter adjustment and optimization, failure mechanism analysis.• Expert in reliability testing and product qualification: endurance, data retention, program disturb, read disturb, yield enhancement, etc.
  • Impinj
    Device Engineer
    Impinj Jan 2005 - Jul 2006
    Seattle, Wa, Us
    • Embedded Logic NVM technology development and retention reliability modeling• Device characterization (NVM, CMOS, LDMOS, diode, resistor, etc.) and SPICE modeling• Oxide reliability (FN tunneling and hot carrier injection characterization and modeling, TDDB, BVDSS measurements)• Test device design, layout, and test chip tapeout• High voltage design rules creation and advancement• Wafer level yield analysis and enhancement• Process and device simulation using Silvaco• Experience with many technology nodes including TSMC 90nm, 0.13um, 0.18um, 0.25um, UMC 0.13um, Chartered 90nm, 0.18um, Tower 0.13um, Canon 0.35um, etc.

Haibo Li Skills

Nand Flash Technology Non Volatile Memory Technology Device Physics Device Characterization Reliability Engineering Failure Analysis Ssd Technology Nand Flash Physics Semiconductors Cmos Flash Memory Characterization Yield Semiconductor Device Embedded Systems Ic Asic Simulations Firmware Testing

Haibo Li Education Details

  • Purdue University
    Purdue University
    Electrical And Computer Engineering
  • Tsinghua University
    Tsinghua University
    Materials Science & Engineering
  • Tsinghua University
    Tsinghua University
    Materials Science And Engineering

Frequently Asked Questions about Haibo Li

What company does Haibo Li work for?

Haibo Li works for Samsung Semiconductor

What is Haibo Li's role at the current company?

Haibo Li's current role is Principal Engineer at Samsung Semiconductor Inc..

What is Haibo Li's email address?

Haibo Li's email address is ha****@****ail.com

What is Haibo Li's direct phone number?

Haibo Li's direct phone number is +140845*****

What schools did Haibo Li attend?

Haibo Li attended Purdue University, Tsinghua University, Tsinghua University.

What skills is Haibo Li known for?

Haibo Li has skills like Nand Flash Technology, Non Volatile Memory Technology, Device Physics, Device Characterization, Reliability Engineering, Failure Analysis, Ssd Technology, Nand Flash, Physics, Semiconductors, Cmos, Flash Memory.

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