RF design and engineering of large venue DAS projects including stadiums, arenas, malls, airports, tunnels, and high-rise buildings.

• Managed software projects delivering new and enhanced libraries and middleware that enabled software developers to target AMD’s hardware products and platforms.• Drove Multimedia Libraries and Middleware engineering solutions from concept to production.• Defined the new project scope, goals and deliverables from requirements gathering, schedules, resource and issues management in accordance with the company processes.• Built, developed, and grew any business relationships vital to the success of the project.• Collaborated with multiple groups within the company for successful and on-time delivery of software projects.

Managed a team of engineers that delivered application software, Linux kernel and device drivers, video codec and image processing libraries that run on ChipWrights ARM based CW5631 System on Chip (SoC), software development tools, SQA and customer support for all of these components. Projects included:• Developed WrightCam 360 degree dewarping IP camera for surveillance applications with a browser based user interface that controls image processing and system settings. • Developed application software for IPTV Set Top Box (STB) and IP camera.• Modified Linux kernel to run all necessary devices: DSP, Ethernet, USB, SDIO, frame buffer, audio and video I/O.• Implemented MJPEG, MPEG2, MPEG4 and H.264 encoders and decoders that were optimized for the CW5631 multi-core processor.• Developed NAND bootloader and u-boot for the CW5631 SoC.• Ported Linux application development environment to OpenEmbedded build system to provide custom Linux SDK distribution to customers.• Developed SQA build and test environment for DSP, kernel and application software.• Developed the initial code base for the CW5631 SoC: eCos HAL, RedBoot, SDIO, Ethernet, USB and tested on an ARM FPGA platform for ASIC verification. Successfully brought up the SoC within two weeks after first samples arrived.• Ported the Kakadu JPEG2000 software into ChipWrights’ DSP code base.• Implemented noise reduction algorithms for ChipWrights’ video compression chip to be used in hand-held Digital Video/Still Dual Camcorders. Optimized the algorithm for speed and memory utilization for the CW4512 DSP.

• Developed new lines of business, including the IEEE 802.11 wireless local area network (WLAN) and IP PBX product lines for small to medium enterprise customers. Services included: systems integration, network design, installation, maintenance and support. • Trained staff on wireless site survey methodology, network design, network security and configuration of the selected Wi-Fi equipment.• Trained staff on network evaluation, voice and data network integration, IP PBX configuration and setup.

• Built, developed, and managed a group of 35 engineers which included System Design and Analysis, Hardware Engineering, DSP Engineering, Strategic Technology and Standards groups. • Expanded and improved the company’s core DSL technologies portfolio and strengthened Aware’s presence in international standards organizations. • Developed FastADSL, Voiced Enabled DSL (VeDSL), Dr. DSL loop diagnostics and monitoring technologies, which enabled Aware to differentiate itself from competitors in the DSL chipset market.• Developed a complete system design and development methodology for Aware’s DSL ASIC core offerings. The methodology included end-to-end system simulation, bit-exact C-model, behavioral models for the DSL cores, real-time emulation platform, and automatic testing environment. This methodology has been successfully implemented with several customer DSL products and resulted in ASIC chipsets that worked completely on the first pass. • Developed Aware’s first complete System on Chip (SoC) solution for ADSL from concept to testchip. The SoC package included DSP and ASIC cores for complete ADSL physical layer functionality.• Technical lead on design and development of World’s first PC plug-in ADSL-lite (G.992.2) modem chipset for Agere.• Designed and prototyped a Symmetric DSL (SDSL) system using Aware’s Fast Wavelet Transform (FWT) chip. • Designed and implemented DSP subsystem for Hybrid Fiber Coax (HFC) modem chipset for telephony.

• Managed a team of DSP engineers.• Researched various coding, equalization, echo cancellation, carrier/timing recovery, and channel spectrum estimation techniques for high-speed modems. Implemented and optimized these algorithms in DSP for voice-band modems.• Represented the company at the CCITT Study Group XVII meetings.• Technical lead in Videoconferencing System project.• Technical lead in multiple voice-band modem projects:- V.34 modem,- V.32bis modem,- Diagnostic V.32 modem.