Hamilton Sanchez Email & Phone Number

Experienced Product Engineer with a demonstrated history of working in the semiconductors industry. Strong engineering professional with a Bachelor of Science in Electrical Engineering focused in Electrical Engineering from University of Washington. Skilled with a variety of tools including: Cadence software with strong background in layout and schematic design. Very experienced with Verilog RTL, and particularly coding up UVM testbench environments for simulation. Well versed with hspice, xa simulations as well as coding skills in Python and C.Recent experience includes creating an abstract testbench framework in SystemVerilog using the UVM framework to allow individuals to blackbox or whitebox test on designs. Well versed in task and software oriented approaches to building testbenches, along with future abstracting this framework by utilizing a python interface for users to easily code, and interact with the underlying UVM framework. Other experience includes knowledge of device physics when pertaining to reliability issues, OPC, and process knowledge to help increase process window. On the circuit side I've done a fair amount of simulation and verification of designs we've created to ensure functionality, as well as some work on the bench to validate functionality. Strong communication skills in English with native understanding of Spanish and functional understanding of Japanese.

Listed skills include Cadence Tools, Linux, Hspice, Python, and 16 others.

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  University Of Washington

  Electrical Engineering