Haneef Mohammed

Haneef Mohammed Email and Phone Number

Senior Technical Management - ASIC/VLSI(SemiConductors), Turnkey Projects, ODCs @ MosChip®
Haneef Mohammed's Location
Hyderabad, Telangana, India, India
Haneef Mohammed's Contact Details

Haneef Mohammed work email

Haneef Mohammed personal email

Haneef Mohammed phone numbers

About Haneef Mohammed

Senior Engineering Management : • Vice President/General Manager, Program Manager – VLSI Physical Design; Multiple Site Management• ASIC/VLSI Design–20+ Yrs of Experience on full Cycle, ~15 Chip/IP Tapeouts.• Physical Design (Place and Route) : Engineering Management and hands on FloorPlan, PnR, CTS, Routing, Timing Closure, Xtalk/Glitch, SignalEM.• RTL, Verification, Netlist to GDS, DFT, Silicon Bring up, N/W L2 S/W Testing.• Lead Multiple Chip tapeouts and about 15 Digital, Mixed-Signal IP (SerDes/DDR3 PHY) tapeouts. Hands on FullChip Place & Route (Hierarchical/Flat), Several Blocks/Tiles, Chips/IPs with die size upto 13mmx17mm. • Experience with TSMC 16nm/28nm/40nm/65nm/90nm/130nm & Samsung/Fujitsu/SMIC/UMC Technologies.• Exposure to CPU/Ethernet/HDLC/PCI/GPIO/JTAG/Generic Serial Ports/uController Verification and RTL Integration of AHB/APB based SoCs.• About 2 Yr Experience in US (Analog Devices, Juniper Networks, MoSys)

Haneef Mohammed's Current Company Details
MosChip®

Moschip®

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Senior Technical Management - ASIC/VLSI(SemiConductors), Turnkey Projects, ODCs
Haneef Mohammed Work Experience Details
  • Moschip®
    Vice President - Engineering (Physical Design)
    Moschip® Apr 2024 - Present
    Hyderabad, Andhra Pradesh, In
    Managing 100+ Members ASIC(Physical) Design Team
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  • Moschip®
    Associate Vice President - Asic Physical Design
    Moschip® Jun 2020 - Apr 2024
    Hyderabad, Andhra Pradesh, In
    Technical Role
    View
  • Hcl Technologies
    Deputy General Manager (Head - Vlsi Group, Hyderabad)
    Hcl Technologies Mar 2018 - Jun 2020
    Noida, Uttar Pradesh, In
    VLSI Group (upto 45 engineers) Site Head, Also, Technically managed all Physical Design projects.
    View
  • Mirafra Technologies
    Senior Director Engineering (Physical Design)
    Mirafra Technologies Apr 2017 - Feb 2018
    Bangalore, Karnataka, In
    Head of All India Implementation(PD, PV, STA, DFT) team of 100+ Engineers(Additionally, Headed the entire Hardware/VLSI Group at Hyderabad)
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  • Mirafra Technologies
    Director Of Engineering
    Mirafra Technologies Mar 2016 - Mar 2017
    Bangalore, Karnataka, In
    Built the VLSI Team at Hyderabad from zero to 40+ and managed it for an year. Did PreSales, Won and Executed Turnkey project(s).
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  • Mosys
    Engineering Manager (Physical Design, Chip/Ip Integration)
    Mosys Oct 2008 - Mar 2016
    San Jose, California, Us
    Corporate(India/US) Physical Design Responsibility(Single point of Contact) - All Chips and IPs (SerDes/DDR3 high speed interface IPs). Developed Backend Flows/Methodology, Planned/Scheduled internal milestones and Customer Deliverables, Support on Post Silicon Issues. Interface with EDA Tool vendors and Select suitable License/Packages, Manage/Effective Utilization of EDA Tools for PD. Built/Hired and Managed Corporate PD Team including Contract Engineers.
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  • Juniper Networks
    Physical Design Specialist (Consultant Through Tata Elxsi Ltd)
    Juniper Networks Oct 2007 - Oct 2008
    Sunnyvale, Ca, Us
    Implemented Customised clock tree and other critical custom paths. Physical Verification(LVS/DRC) of sub-blocks and very large sized blocks.
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  • Ikanos Communications
    Sr. Vlsi Design Engineer
    Ikanos Communications Feb 2006 - Oct 2007
    Fremont, Ca, Us
    (Now, Ikanos Communications is part of Qualcomm - Got Acquired)
    View
  • Analog Devices
    Senior Vls Design Engineer
    Analog Devices Nov 2002 - Feb 2006
    Wilmington, Ma, Us
    ADI's Network Processor Product Line was acquired by Ikanos Communications Inc., in Feb, 2006
    View
  • Analog Devices
    Associate Member Technical Staff (Vlsi)
    Analog Devices Jan 2000 - Oct 2002
    Wilmington, Ma, Us
    Initially, I joined Chiplogic (A Fabless Semiconductor startup) through Osmania University College of Engineering(Campus Recruitment). This was acquired by Analog Devices.
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Haneef Mohammed Skills

Soc Physical Design Eda Vlsi Asic Physical Verification Mixed Signal Drc Static Timing Analysis Verilog Timing Closure Primetime Functional Verification Dft Tcl Ic Engineering Management Project Management Program Management Rtl Design Semiconductors Debugging Perl Fpga Systemverilog Integrated Circuit Design Cmos Vhdl Application Specific Integrated Circuits System On A Chip Very Large Scale Integration

Haneef Mohammed Education Details

  • Birla Institute Of Technology And Science, Pilani
    Birla Institute Of Technology And Science, Pilani
    Software Systems
  • Osmania University
    Osmania University
    Electronics & Communication
  • Govt. Polytechnic, Nizamabad(Telangana)
    Govt. Polytechnic, Nizamabad(Telangana)
    Electronics & Communication Engineering

Frequently Asked Questions about Haneef Mohammed

What company does Haneef Mohammed work for?

Haneef Mohammed works for Moschip®

What is Haneef Mohammed's role at the current company?

Haneef Mohammed's current role is Senior Technical Management - ASIC/VLSI(SemiConductors), Turnkey Projects, ODCs.

What is Haneef Mohammed's email address?

Haneef Mohammed's email address is ha****@****hoo.com

What is Haneef Mohammed's direct phone number?

Haneef Mohammed's direct phone number is +9180300*****

What schools did Haneef Mohammed attend?

Haneef Mohammed attended Birla Institute Of Technology And Science, Pilani, Osmania University, Govt. Polytechnic, Nizamabad(Telangana).

What skills is Haneef Mohammed known for?

Haneef Mohammed has skills like Soc, Physical Design, Eda, Vlsi, Asic, Physical Verification, Mixed Signal, Drc, Static Timing Analysis, Verilog, Timing Closure, Primetime.

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