I have been an electrical engineer for 35 years, and offer a breadth of expertise in PCB design, particularly high speed digital, multi-layered assemblies. I also can advise on any aspect of ASIC design from PRD to tape-out.With this experience, I can provide expert guidance every step of the way from system architecture through production-level PCBAs.Areas of expertise:-Texas Instruments DLP controllers and digital micromirror devices (DMDs)-Design best practices-Design reviews, quality assurance, and sign-off-Technical documentation-All aspects of ASIC design-Building a world-class engineering team-Coordination of component sourcing with contract manufacturers-3D printing-Many more!Please contact me if you are interested in bringing your next product to market!

I have a large selection of quality stock photographs, covering a broad range of subjects.

At Carbon, I had the opportunity to participate in whatever was needed to advance the goal of getting product out the door.Outside of my work, I was part of the leadership team of the People of Color Employee Resource Group (PoC-ERG). Our focus was on education, obtaining speakers, planning events, building a physical library of books, and supporting Diversity, Equity, Inclusion, and Belonging (DEIB). This was a passion project for me that I am proud of.Design work:-10 Unique PCBA designs-PCBA schematic and layout, 2 to 14 layers, up to 10Gbps, USB 2.0, I2C, JTAG, UART, ADC, DAC, HSD-PCB design library augmentation/maintenance-Detailed design reviews and testplan development-Bring-up and debug-Leading a cross functional team which included electrical, platform SW and optics specialists, to ensure that the light engine subsystem worked properlyTechnologies:-Full Texas Instruments DLP(tm) WQXGA and true 4K Digital Micromirror Device (DMD) subsystem design-Microchip/Atmel microcontrollers-TI Arm Cortex-M4 MCUs-Optoelectronics, such as photodiode array calibration-Control of programmable LED stripsTools and languages:-Altium Designer-Python, PERL-Arduino Sketch and Sketch-like codingSkills/experience:-Oscilloscopes and DMMs-Designing and building harnesses-SMT soldering from 0402-ASIC and FPGA document/architect/design/build/test-In-system bringup and test of our M3Max light engines-Worked directly with local and overseas CMs to get PCBAs and subsystems manufactured-Procurement in the face of the pandemic and severe supply chain shortages-Resin 3D printing-Laser cuttingOther:-Designing for safety in a volatile solvent environment-Using SolidWorks to design and build 3D-printed of enclosures and fixtures-Actuators, sensors, slip ringsPlease view complete description here, as I will otherwise exceed the character limit. Worth your time!https://docs.google.com/document/d/1zRyfbPYJJo0vSbl4AiM70conpiA6tuGh7H0TJIf1i84/edit?usp=sharing

-Designed and implemented cryptographic hardware IP residing in >9 billion Android devices-Defined the architecture and was project lead for an entire chip, the largest in Rambus' history. I was the sole author of chip specifications, and did microarchitecture and design of major functional blocks in RTL. The chip is an Anti-Counterfeiting Security ASIC: a secure, flexible device that is a self-contained root of trust, used for consumable, medical, and automotive marketing verticals. This device provides not only digital security, but physical security with anti-tamper mechanisms built into silicon.-Defined and patented proprietary secure hardware design techniques.-Project lead for a Differential Power Analysis (DPA) evaluation board, containing a Xilinx Kintex-7 FPGA that implements hardware ciphers.-Invented a game-changing approach to secure hardware design, at the digital gate/transistor level, which will go into Rambus’ next generation of anti-counterfeiting technology.-Mentored junior engineers.-As a project lead, coordinated with program management, customers and vendors to navigate risk. Worked with internal hardware and software teams located around the world. Created and managed schedule. Fostered a values-based approach to team interaction and execution.-Lead or contributor to 3 generations of CryptoManager(™) IP hardware core, used as a root of trust that provides a secure execution environment, hardware-accelerated symmetric and asymmetric cryptography, secure key provisioning, attestation, feature enablement, and a host of other features. Used in Qualcomm Snapdragon processors as part of a secure element. Used in two large, multi-billion dollar Japanese corporations.-Lead or contributor to Transport CryptoFirewall(™) IP hardware core, used to securely deliver content decryption keys to a set-top box or over-the-top streaming device.Other experience:-Silicon reverse engineering/anti-counterfeiting expertise.-Non-volatile memories.