Vlsi Functional Verification Training
CurrentSkilled in performing chip verification, ensuring functional correctness and adherence to design specifications.UVM (Universal Verification Methodology): Proficient in utilizing UVM methodologies to develop verification environments and robust verification components.Verilog & SystemVerilog: Experienced in coding efficient and scalable verification testbenches and verification components.EDA Tools: Proficient in using industry-standard tools such as Questasim and EDAplayground to simulate and debug designs, ensuring accurate verification results.Gvim: Skilled in utilizing the Gvim text editor to enhance coding efficiency and productivity during development and verification tasks.Linux & Windows: Familiarity with both Linux and Windows operating systems, leveraging command-line interfaces to streamline workflows.Digital Design: Solid understanding of digital design principles, enabling effective collaboration with design teams to identify potential issues and deliver verified designs.
