Harm Peters
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Harm Peters Email & Phone Number

VP Silicon Design Engineering at Euclyd B.V.
Location: Eindhoven, North Brabant, Netherlands 5 work roles 1 school
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Current company
Role
VP Silicon Design Engineering
Location
Eindhoven, North Brabant, Netherlands
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Who is Harm Peters? Overview

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Harm Peters is listed as VP Silicon Design Engineering at Euclyd B.V., a company with 133841 employees, based in Eindhoven, North Brabant, Netherlands. AeroLeads shows a matched LinkedIn profile for Harm Peters.

Harm Peters previously worked as Tech Lead Hardware Design and Implementation (NEX Xeon and Networking Engineering Group) at Intel Corporation and Physical Design manager Imaging IP (IPG Imaging and Camera Technology Group.) at Intel Corporation. Harm Peters holds Bachelor Of Engineering - Be, Electrical Engineering from Fontys University Of Applied Sciences.

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Euclyd B.V.

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Profile bio

About Harm Peters

Seasoned IC Design Tech Lead and Manager with over 25 years of experience leading cross-functional teams to deliver complex, high-performance Semiconductor solutions. Proven expertise in RTL design, synthesis, FPGA, and physical implementation, leveraging advanced Synopsys EDA tools to optimize power, performance, and area (PPA). Skilled in establishing, mentoring and developing teams, fostering a collaborative work environment, and driving innovation. Strong track record in multi-site collaboration and customer engagement.

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Harm Peters's current company

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Euclyd B.V.
Euclyd B.V.
VP Silicon Design Engineering
Eindhoven, NB, NL
Website
Employees
133841
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5 roles · 34 years

Harm Peters work experience

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Vp Silicon Design Engineering

Eindhoven, NB, NL

Tech Lead Hardware Design And Implementation (Nex Xeon And Networking Engineering Group)

Current

Eindhoven Area, Netherlands

As an individual contributor, my primary objective is efficient hardware implementation by performing path-finding and design-space exploration (DSE). My collaboration with key stakeholders, including RTL designers, firmware teams, architects, and physical design teams, results in innovative solutions and efficient integration processes. My expertise in.

Jul 2018 - Present

Physical Design Manager Imaging Ip (Ipg Imaging And Camera Technology Group.)

- Build from scratch and managed a team of Physical Designers (team size 10). Through my leadership the team did the implementation of complex imaging IP layout partitions by using both industry standard EDA tools, but using some proprietary tools as well. The work involved the whole spectrum of Physical Design: like logic synthesis, constraint review.

Feb 2011 - Jun 2018

Team Leader And Senior Vlsi Engineer

Eindhoven, North Brabant, Netherlands

Being part of this exciting start-up from the beginning. This start-up span-out from Philips Research and supplies Semiconductor Intellectual properties (IP). It designs, builds, and licenses application-specific system solutions for use in consumer electronics and mobile terminals applications by semiconductor manufacturers and original equipment.

Mar 2007 - Feb 2011

Senior Ic Design Engineer

Philips Research

Various roles:- Diagnostics/failure analysis on Integrated circuits (Light Emission Microscopy, liquid crystal, Pico probing) (~3.5 years). As laboratory assistant providing diagnostic services to design teams and help design teams to pinpoint design failures. Furthermore, as research assistant contributed to some internal reports on application of.

1992 - 2007 ~15 yrs
Team & coworkers

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1 education record

Harm Peters education

FAQ

Frequently asked questions about Harm Peters

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What company does Harm Peters work for?

Harm Peters works for Euclyd B.V..

What is Harm Peters's role at Euclyd B.V.?

Harm Peters is listed as VP Silicon Design Engineering at Euclyd B.V..

Where is Harm Peters based?

Harm Peters is based in Eindhoven, North Brabant, Netherlands while working with Euclyd B.V..

What companies has Harm Peters worked for?

Harm Peters has worked for Euclyd B.V., Intel Corporation, Silicon Hive, and Philips Research.

Who are Harm Peters's colleagues at Euclyd B.V.?

Harm Peters's colleagues at Euclyd B.V. include Zhi Tong Lim, Dengwei Hu, Rajat K Paul, Phd, Oducha Jayesh, and Todd Jennings Davis.

How can I contact Harm Peters?

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What schools did Harm Peters attend?

Harm Peters holds Bachelor Of Engineering - Be, Electrical Engineering from Fontys University Of Applied Sciences.

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