Harry Rogers Email & Phone Number

San Mateo, California, US

San Mateo, California, US

• Managed development operations team to move from startup infrastructure to a common, global, fault-tolerant processes for perception, driving functions and middleware teams.

• Specified architecture and implementation of worldwide, multi-petabyte data plane architecture to enable continuous curation, processing and archive of procured and synthetic (simulated) automotive sensor data
• Developed, implemented and managed worldwide, regional and site-specific networking and computing architecture and infrastructure to enable development of automated driving assistance systems by teams in Korea.
• Led technical customer interface with automotive OEMs and Tier 1 suppliers to specify computing requirements and architecture for in-vehicle driving system hardware

• Executed hardware architecture due diligence for SSIC investment and incubation efforts
• Built advanced system architectures for scale-out and HPC environments with internal and external partners
• Computed and presented detailed microarchitectural analyses of storage, network and security stacks and algorithms for in-vehicle, scale-out and HPC processes required for automated driving system development and.
• Created architecture for and managed installation of on-premises High Performance Computing for SSIC partners
• Specified and implemented proof-of-concept Kubernetes infrastructure for microservices research and provisionable scale-out automotive simulation

• Quantified, developed and characterized advanced storage reference architectures for scale-out and enterprise environments, resulting in acceleration of new technology adoption by OEM and software partners
• Created processes for IP ideation, mentoring and retention to enable > 50 successful MSL patent filings per year
• Creation of advanced system-level storage architectures, including architecture specification, proof-of-concept implementation, demonstration and measurement of salient metrics, publication of findings.
• Defined, designed, implemented and operated provisionable laboratory for development and test of scale out storage systems and service based on novel NVMe architectures

Redmond, Washington, US

• Advised online service architects (Bing, Hotmail, Azure, etc.). to enable migration of services from specialized hardware platforms to low-cost, provisionable, scalable hosts
• Co-authored Data Center Manageability Interface (DCMI) standard (w/Intel) to simplify and standardize out-of-band manageability for scale-out systems
• Created best practices for physical metrics collection and analysis to optimize data center utilization and reduce power and cooling infrastructure costs.
• Developed hyperscale TCO models for proprietary server/container solutions to normalize supply-chain decisions
• Evaluated new CPU and I/O architectures to effect tradeoffs of infrastructure and operational costs with performance.

Santa Clara, California, US

* Developed system architecture and researched high performance signaling technology. * Delivered architectural and design collateral to establish innovative circuit and design techniques as strategic elements of Intel’s technology roadmap.* Established and secured funding for a strategic research project to develop methods for measurement and debug of.

US

* Defined architecture and roadmaps for PC-based RAID systems, represented corporate interests to relevant industry standards bodies and led product hardware development.* Represented Adaptec to Infiniband Trade Association; served as interim Chair of Mechanical subgroup at time of Volume 2, 1.0a specification publication.* Designed RAID system electrical.

Houston, Texas, US

Standards development, high-performance PC server architecture and development, product engineering.

Houston, Texas, US

* PC system product design and development* PC server architecture, including first–to-market SystemPro server* Microarchitecture analysis * PC Server market research, including customer and vendor interface * All levels of hardware design* Product handoff to manufacturing