nanoDC Lab IITGN: -Worked on industrial FPGA based project(BRAM, UART).-Worked on 6T SRAM ASIC testing.Dharmsinh Desai University:-Designing of Point to Point and Convolution based Image processing algorithms on FPGA.-Designing of the Noise Immune QPSK MODEM on FPGA(Research Work).-Designing of the Hybrid CPU with 64 bit RISC-V processor & 32 bit Floating Point processor with VerilogHDL. -Built Driver Assist System for Deaf Persons(C, C++). An SSIP approved project.