Hasan A. Email & Phone Number

İzmir, Turkey

Drone Photography

DVD production for Sales purpose. Photography services including enhancements using Photoshop. Providing customized digital media (Graphic design, Video and Photography) support for individuals and small businesses. Design and installation Wi-Fi (802.11a,b,g) Wireless Networks. PC training, upgrade, repair, installation, maintenance and support. Consulting Service and repair of computer systems and networks for small business and home users.

Interfacing with Dell Customers on Various hardware and software issues and resolving through repair and updates for Laptops and Desktops computers.

Responsible for testing and validating the Bios releases for the Intel Xeon Based server products. Verification involves all aspects of Bios, SMBIOS, ACPI, Memory and System RAS (Reliability, Availability and Serviceability) features, OS level testing using Linux (Red Hat, SuSe), Windows 2003 Server, Windows XP, Windows 2000, Intel Server Management, PCI hot plug and other OS features. Responsible for filing defects and interfacing with BIOS engineers toward resolution using PVCS tracker system.

Responsible for testing and validating the Bios releases for the Intel Xeon Based server products. Verification involves all aspects of Bios, SMBIOS, ACPI, Memory and System RAS (Reliability, Availability and Serviceability) features, OS level testing using Linux (Red Hat, SuSe), Windows 2003 Server, Windows XP, Windows 2000, Intel Server Management, PCI hot plug and other OS features. Responsible for filing defects and interfacing with BIOS engineers toward resolution using PVCS tracker system.

Intel Corporation (Nov 7, 2005-July 2006) Bios Validation Engineer.Responsible for testing and validating the Bios releases for the Intel Xeon Based server products. Responsible for filing defects and interfacing with BIOS engineers toward resolution using PVCS tracker system. Intel Corporation-DuPont, WA -(Nov 2001-May 2003): Senior Chipset Validation Engineer.Intel Corporation-DuPont, WA-(April99-Nov 2001): Senior Workstations Products Validation Engineer.Intel Corporation-DuPont, WA -(July96-April99): Enterprise Servers group IO Development Engineer.Intel Corporation-Hillsboro, OR (Jan 95-July 96): Customer Support-Market Analysis EngineerIntel Corporation-Hillsboro, OR (May 1984 -Jan95) Test HW/SW Development Engineering. (In Various Intel groups)Project Leader and HW / SW interface software design of testers. Proficient in C, Assembly language and Intel x86 architecture. Designed H/W and S/W (in C) for the Lead design engineer and Project leader for Boundary Scan tester for the 486DX2 processor.

Responsible for identifying, tracking and bringing to resolution chipset and processor bugs in Desktop Products and OEM systems. Elevating issues to "sighting" level in the in-house "Tracker" data base and working with cross organizational teams to follow up and resolve them in a timely manner before release.

Responsible for identifying, tracking and bringing to resolution chipset and processor bugs in Desktop Products and OEM systems. Elevating issues to "sighting" level in the in-house "Tracker" data base and working with cross organizational teams to follow up and resolve them in a timely manner before release.

Project Leader Responsible for bring up of 4-way servers. Test Plans, acquisition of IA64 software tools, planning of validation methodology, checklists, training of new technicians. Weekly results charting and reporting to project teams. Creation of final test reports. Testing of new IA64 drivers and MS and Linux OS drops, entering bugs in a tracking data base and follow up with vendors and technical marketing engineers for timely resolution. Providing feedback to design engineers for design changes for testability and manufacturability. Overall responsibility of Platform Validation of first IA64 (Itanium) workstation.

Project Leader Responsible for bring up of 4-way servers. Test Plans, acquisition of IA64 software tools, planning of validation methodology, checklists, training of new technicians. Weekly results charting and reporting to project teams. Creation of final test reports. Testing of new IA64 drivers and MS and Linux OS drops, entering bugs in a tracking data base and follow up with vendors and technical marketing engineers for timely resolution. Providing feedback to design engineers for design changes for testability and manufacturability. Overall responsibility of Platform Validation of first IA64 (Itanium) workstation.

Enterprise Servers group IO Development Engineer.Responsible for I/O Validation of server products. Writing test plans for Validating Peripherals, and working on architecture of next generation IO technologies such as Fibre Channel for the server products. Interfacing with outside vendors on providing server solutions for future designs. Responsibilities included supporting multiprocessor servers and defining IO interfaces. Worked on Enterprise level Clustering solution using the High End Server products and Multi Terabyte Storage systems using Fibre Channel technology. Responsible for maintaining department Website.

Enterprise Servers group IO Development Engineer.Responsible for I/O Validation of server products. Writing test plans for Validating Peripherals, and working on architecture of next generation IO technologies such as Fibre Channel for the server products. Interfacing with outside vendors on providing server solutions for future designs. Responsibilities included supporting multiprocessor servers and defining IO interfaces. Worked on Enterprise level Clustering solution using the High End Server products and Multi Terabyte Storage systems using Fibre Channel technology. Responsible for maintaining department Website.

Responsible for major accounts for test correlation issues between customer IQC (Incoming Quality Control) and Intel's test process. Define and recommend and implement test process/software changes to increase quality of Intel motherboard and Server system products. Implement hardware improvements to Functional /System level testers for better quality. Attended Visual Basic Class.

Responsible for major accounts for test correlation issues between customer IQC (Incoming Quality Control) and Intel's test process. Define and recommend and implement test process/software changes to increase quality of Intel motherboard and Server system products. Implement hardware improvements to Functional /System level testers for better quality. Attended Visual Basic Class.

Test HW/SW Development Engineering. (In Various Intel groups)Designed a Debug board (Post-aid) to be used for Debug of Intel PC boards. Wrote built in diagnostics for testing PCI chipsets. Familiar with Pentium and PCI architecture. Designed a In Target Probe (ITP) socket adapter for P54C processor. Provided Pentium ICE training to all Intel sites. Designed of various vacuum fixtures for motherboard testers. Project Leader and HW / SW interface software design of testers. Proficient in C, Assembly language and Intel x86 architecture. Designed H/W and S/W (in C) for the Lead design engineer and Project leader for Boundary Scan tester for the 486DX2 processor. Test Software development for various Multibus I and II boards. Design and implementation of first generation PC motherboard tester.

Test HW/SW Development Engineering. (In Various Intel groups)Designed a Debug board (Post-aid) to be used for Debug of Intel PC boards. Wrote built in diagnostics for testing PCI chipsets. Familiar with Pentium and PCI architecture. Designed a In Target Probe (ITP) socket adapter for P54C processor. Provided Pentium ICE training to all Intel sites. Designed of various vacuum fixtures for motherboard testers. Project Leader and HW / SW interface software design of testers. Proficient in C, Assembly language and Intel x86 architecture. Designed H/W and S/W (in C) for the Lead design engineer and Project leader for Boundary Scan tester for the 486DX2 processor. Test Software development for various Multibus I and II boards. Design and implementation of first generation PC motherboard tester.

. Test and evaluation of Hard Drives used in Various IBM system such as System 36. Developed tests and procedures for automated testing of Hard Drives. Provided feedback to Design Engineering based on the evaluation of Hard Disk Storage systems.

. Test and evaluation of Hard Drives used in Various IBM system such as System 36. Developed tests and procedures for automated testing of Hard Drives. Provided feedback to Design Engineering based on the evaluation of Hard Disk Storage systems.

Celta, Teaching English As A Second Or Foreign Language/Esl Language Instructor

To become an English Teacher.

Ms; Ms, Electrical And Computer Engineering; Computer; Physical Oceanography

Computer Engineering

Ms, Physical Oceanography

Activities and Societies: Feasibility study of Akkuyu Nuclear Power Station. Oceanography

Bs, Electrical Eng.

Activities and Societies: Mountaineering and Ski Club, Field and Track team member. Electrical Engineering

High School, Physical Sciences

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