David Heim

David Heim Email and Phone Number

Digital IC Designer @ Sensirion
Zurich, Switzerland
David Heim's Location
Lausanne, Vaud, Switzerland, Switzerland
About David Heim

EPFL master's graduate as an Electrical Engineer with a specialization in Bioelectronics. I have focused my studies and career on IC design.

David Heim's Current Company Details
Sensirion

Sensirion

View
Digital IC Designer
Zurich, Switzerland
Website:
sensirion.com
Employees:
788
David Heim Work Experience Details
  • Sensirion
    Digital Ic Designer
    Sensirion
    Zurich, Switzerland
  • Sensirion
    Associate Digital Ic Designer
    Sensirion Apr 2023 - Present
    Zurich, Switzerland
    Design and verification tasks to employ new digital solutions for the future low-power low-area sensor products.
  • Raaam Memory Technologies
    Analog & Mixed Signal Ic Engineer
    Raaam Memory Technologies Jul 2022 - Apr 2023
    Lausanne, Vaud, Switzerland
    Engineering work related to the design, verification, layout, and measurement of DRAM-related circuits. The development of a Gain-Cell embedded DRAM macro has shown to provide several benefits over its static counterpart. Due to its smaller area footprint, this technology allows the integration of much more on-chip memory compared to classic SRAM macros. This advantage is very important in memory-hungry applications such as AI, IoT, 5G and automotive.
  • École Polytechnique Fédérale De Lausanne
    Master'S Thesis In Ic Design
    École Polytechnique Fédérale De Lausanne Feb 2022 - Jul 2022
    Lausanne, Vaud, Switzerland
    The topic of the thesis involved providing solutions to minimize power consumption in Gain-Cell embedded DRAM memories. Analog and mixed signal circuit solutions have been designed to reduce the refresh power consumption of the embedded DRAMs by over 1000 times. Moreover, built in self-test (BIST) and built in redundancy analysis (BISR) functions have been developed to replace faulty bit cells by redundant cells in order to improve power consumption and yield. Keywords for this work were low power and low area overhead circuit design.
  • Ibm
    Cryo-Cmos Circuit Design For Quantum Computing
    Ibm Aug 2021 - Feb 2022
    Zurich, Switzerland
    Seven-month internship in collaboration with IBM Watson Research Lab, working on the design of cryogenic CMOS circuits to be implemented in the next generation of quantum computers. The analog front-end together with the digital back-end have been designed in advanced Fin-FET nodes, taking into consideration physical device effects happening at cryogenic temperatures. A part of the internship also involved performing RF measurements of previously taped-out ICs for comparison of circuit performance between room temperature and cryogenic temperatures.
  • Epfl (École Polytechnique Fédérale De Lausanne)
    Internship
    Epfl (École Polytechnique Fédérale De Lausanne) Jul 2018 - Aug 2018
    Lausanne, Vaud, Switzerland
    Internship in the BIOROB lab of EPFL. My tasks consisted in doing PCB designing, microcontroller programming and PCB manufacturing on a robot localization system for EPFL’s interdisciplinary robot competition.
  • Epfl (École Polytechnique Fédérale De Lausanne)
    Teaching Assistant
    Epfl (École Polytechnique Fédérale De Lausanne) Feb 2018 - Jul 2018
    Lausanne, Vaud, Switzerland
    Teaching assistant for the course "Logic systems" taught to second year bachelor students in the micro-engineering faculty of EPFL.
  • Coachapp & Appapp Soutien Aux Apprentis
    Math And Electrotechnics Coach
    Coachapp & Appapp Soutien Aux Apprentis Sep 2016 - Jun 2018
    Lausanne, Vaud, Switzerland
    My role was to provide assistance to two groups of four apprentices with difficulties in electrotechnics and math. The challenging part is to explain concepts that seem simple to young people that have difficulty in a specific subject.
  • Samb
    Electronic
    Samb Sep 2011 - Jun 2015
    Bellinzona, Ticino, Switzerland
    Experience gained during the apprenticeship. Most of the work was dedicated to PCB prototyping (Altium) and manufacturing, microcontroller programming in C, and other general lab work such as troubleshooting electronic devices.

David Heim Education Details

Frequently Asked Questions about David Heim

What company does David Heim work for?

David Heim works for Sensirion

What is David Heim's role at the current company?

David Heim's current role is Digital IC Designer.

What schools did David Heim attend?

David Heim attended Epfl (École Polytechnique Fédérale De Lausanne), Nanyang Technological University, Epfl (École Polytechnique Fédérale De Lausanne), Samb.

Who are David Heim's colleagues?

David Heim's colleagues are Pawel Markunowicz, Bruno Meier, Byoung Hoon Park, Laura Prioli, Tanja Nikolic, Stephan Braun, Bea Christen.

Not the David Heim you were looking for?

Free Chrome Extension

Find emails, phones & company data instantly

Find verified emails from LinkedIn profiles
Get direct phone numbers & mobile contacts
Access company data & employee information
Works directly on LinkedIn - no copy/paste needed
Get Chrome Extension - Free

Aero Online

Your AI prospecting assistant

Download 750 million emails and 100 million phone numbers

Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.