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Herbert Rivera-Sanchez Email & Phone Number
Principal Engineer
at
Marvell Technology
1 work email found
@marvell.com
1 phone found area 919
LinkedIn matched
✓ Verified Jun 2026
4 data sources
Profile completeness 100%
Current company
Role
Principal Engineer
Location
Durham, North Carolina, United States
Who is Herbert Rivera-Sanchez? Overview
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Quick answer
Herbert Rivera-Sanchez is listed as Principal Engineer at Marvell Technology, based in Durham, North Carolina, United States. AeroLeads shows a work email signal at marvell.com, phone signal with area code 919, and a matched LinkedIn profile for Herbert Rivera-Sanchez.
Herbert Rivera-Sanchez previously worked as Sr. Staff Verification Engineer at Marvell Technology and North America Verification Customer Engagement Architect at Cadence Design Systems at Cadence Design Systems. Herbert Rivera-Sanchez holds Master Of Science, Electrical And Computer Engineering from North Carolina State University.
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Email format at Marvell Technology
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*@marvell.com
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AeroLeads found 1 current-domain work email signal for Herbert Rivera-Sanchez. Compare company email patterns before reaching out.
Profile bio
About Herbert Rivera-Sanchez
Specialties: Study, analyze, and interpret design requirements and application scenarios in order to architect designs and verification environments that integrate the Cadence SVG portfolio. Verification Planning and Management, Specman e language, SV language, Incisive Plan To Closure Methodology-MDV, e Reuse Methodology, Universal Reuse Methodology, OVM, Universal Verification Methodology.
Listed skills include Functional Verification, Open Verification Methodology, Verilog, Specman, and 19 others.
Current workplace
Herbert Rivera-Sanchez's current company
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15 roles · 41 years
Herbert Rivera-Sanchez work experience
A career timeline built from the work history available for this profile.
Principal Engineer
Current
Mar 2021 - Present
Sr. Staff Verification Engineer
Sep 2020 - Mar 2021
North America Verification Customer Engagement Architect At Cadence Design Systems
North America Verification Customer Engagement Architect at Cadence Design Systems at Cadence Design Systems. Understand the customer’s verification needs and work as liaison between customer, RnD and Sales to provide the right solution for the customer and enhanced Cadence verification solutions at customer’s flow. Displace competitors and create moats.
Sep 2018 - Sep 2020
Ipg Central Verification Chief Architect
IPG SerDes IP Verification Director - Manage the verification and project execution of all IPG SerDes IP devices (PCIe/Eth/DP/GDDR6/D2D) across North America and India. Architected and managed the Palladium model creations for all PHY devices. DIP Verification Methodology - Responsible for driving all Methodology and Efficiencies in DIP Verification..
Nov 2016 - Sep 2018
Ipg Cto Office Solutions Architect
Architect and drive the requirements of VIP for Analog verification.Learn DDR4 VIP infrastructure and usage in order to architect DDR4 IVD plug-in/modifications required for the implementation of Performance analysis using IWB.
Oct 2015 - Nov 2016
Vip Solutions Architect
NA Deployment P.O.C. / NA Ethernet Deployment Owner. NA Focus Account Support + key WW accounts. VIP-DIP Liason -Addressed Usability Verification + PV across both teams. VIP Ease Of Use Project Owner - Substantially improve the ease of deployment across the VIP Catalog. Make the VIP Catalog products consistent across documentation, processes, examples.
May 2012 - Nov 2016
Vip Specialist Na
Verification IP Specialist for North America. Study, analyze, and interpret design requirements and application scenarios in order to architect designs and verification environments that integrate VIP in the Cadence catalog. Verification Planning and Management, Specman e language, SV language, Incisive Plan To Closure Methodology-MDV, e Reuse Methodology.
May 2011 - May 2012
Sr. Engineer
Design Verification Specialist. Depth in Design Verification methodology, Verification Environments architectures, AOP and OOP techniques using OVM (multiple languages: Specman and SV).
Sep 2010 - May 2011
Sr Consultant Verification Eng
Jun 2006 - Sep 2010
Sr Verification Engineer
2001 - 2006
~5 yrs
Principal Engineer
Amcc (Formerly Rtc)
2001 - 2006
~5 yrs
Verification Manager
1998 - 2001
~3 yrs
Verification Manager
Nortel
1999 - 2000
~1 yr
Staff Engineer
1985 - 1995
~10 yrs
1 education record
Herbert Rivera-Sanchez education
-
North Carolina State University
FAQ
Frequently asked questions about Herbert Rivera-Sanchez
Quick answers generated from the profile data available on this page.
What company does Herbert Rivera-Sanchez work for?
Herbert Rivera-Sanchez works for Marvell Technology.
What is Herbert Rivera-Sanchez's role at Marvell Technology?
Herbert Rivera-Sanchez is listed as Principal Engineer at Marvell Technology.
What is Herbert Rivera-Sanchez's email address?
AeroLeads has found 1 work email signal at @marvell.com for Herbert Rivera-Sanchez at Marvell Technology.
What is Herbert Rivera-Sanchez's phone number?
AeroLeads has found 1 phone signal(s) with area code 919 for Herbert Rivera-Sanchez at Marvell Technology.
Where is Herbert Rivera-Sanchez based?
Herbert Rivera-Sanchez is based in Durham, North Carolina, United States while working with Marvell Technology.
What companies has Herbert Rivera-Sanchez worked for?
Herbert Rivera-Sanchez has worked for Marvell Technology, Cadence Design Systems, Open-Silicon, Amcc, and Amcc (Formerly Rtc).
How can I contact Herbert Rivera-Sanchez?
You can use AeroLeads to view verified contact signals for Herbert Rivera-Sanchez at Marvell Technology, including work email, phone, and LinkedIn data when available.
What schools did Herbert Rivera-Sanchez attend?
Herbert Rivera-Sanchez holds Master Of Science, Electrical And Computer Engineering from North Carolina State University.
What skills is Herbert Rivera-Sanchez known for?
Herbert Rivera-Sanchez is listed with skills including Functional Verification, Open Verification Methodology, Verilog, Specman, Eda, Asic, Systemverilog, and Cadence.
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