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Het Dani Email & Phone Number
IP Logic Pre-Silicon Verification Intern
at
Intel Corporation
LinkedIn matched
✓ Verified August 2026
3 data sources
Profile completeness 86%
Current company
Role
IP Logic Pre-Silicon Verification Intern
Location
Corvallis, Oregon, United States
Who is Het Dani? Overview
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Quick answer
Het Dani is listed as IP Logic Pre-Silicon Verification Intern at Intel Corporation, based in Corvallis, Oregon, United States. AeroLeads shows a matched LinkedIn profile for Het Dani.
Het Dani previously worked as Digital Verification Engineer at Onsemi and Project Trainee at Reliance Jio Infocomm, Mumbai. Het Dani holds Master Of Science - Ms, Electrical And Computer Engnineering from Portland State University.
Company email context
Email format at Intel Corporation
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Intel Corporation
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Profile bio
About Het Dani
Digital Verification Engineer at Onsemi. Currently working on Cyber-Security IP Design for Next-Gen Image Sensors.Technical Skillset:HDL/Programming Languages: Verilog, SystemVerilog, CScripting Language: PerlVerification Methodologies: UVMEDA Tools: Proficient with Siemens QuestaSim/Visualizer, Verdi FSDB Debug (Synopsys), Synopsys Verdi, Synopsys VCFormal (SEQ,AEP,FXP, FCA, FPV Apps)Operating Systems: Comfortable with Windows, Linux (Ubuntu Distribution).Architecture: Cache Hierarchy, Intel x86 Assembly, Memory Hierarchy (DDR4), RISC-V ISA & Micro-architectureVerification Concepts: SystemVerilog Assertions, Constrained Random Verification, SV OOPs, CoverageFormal Verification Concepts: BDDs, SAT-based model checking problems, Equivalence checking using VC-Formal Apps, CTL & LTL Boolean Problems.
Current workplace
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4 roles
Het Dani work experience
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Digital Verification Engineer
CurrentCyber-Security IP Design for Next-Gen Image Sensor Platform
Jul 2023 - Present
Ip Logic Pre-Silicon Verification Intern
Memory Controller IP Design Team - IPGMemory Technologies: DDR, HBM--->Worked with the Functional Verification Team on IP Triggers (RAS) Verification useful for Post-Si Debug & survivability.--->Supported DFD feature Verification by porting & developing UVM sequences to incorporate functionality of CSRs compliant with current generation of Memory Controllers.--->Worked with the Performance Verification Team & developed various automation scripts which helped the team analyze, triage failure buckets and debug in case of volume failures.
Jun 2022 - May 2023
Project Trainee
Worked on a project based on Algorithm for Design of ACP(Automatic Cell Planning)
Dec 2020 - Mar 2021
3 education records
Het Dani education
Master Of Science - Ms, Electrical And Computer Engnineering
Portland State University
Bachelor Of Technology - Btech, Electronics And Communications Engineering
Dharmsinh Desai University
Education record
Delhi Public School - Bopal, Ahmedabad
FAQ
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Quick answers generated from the profile data available on this page.
What company does Het Dani work for?
Het Dani works for Intel Corporation.
What is Het Dani's role at Intel Corporation?
Het Dani is listed as IP Logic Pre-Silicon Verification Intern at Intel Corporation.
Where is Het Dani based?
Het Dani is based in Corvallis, Oregon, United States while working with Intel Corporation.
What companies has Het Dani worked for?
Het Dani has worked for Intel Corporation, Onsemi, and Reliance Jio Infocomm, Mumbai.
How can I contact Het Dani?
You can use AeroLeads to view verified contact signals for Het Dani at Intel Corporation, including work email, phone, and LinkedIn data when available.
What schools did Het Dani attend?
Het Dani holds Master Of Science - Ms, Electrical And Computer Engnineering from Portland State University.
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