ASIC Design Engineer | IC Design Specialist | Successful TapeoutsAs an ASIC Design Engineer with a proven track record of successful tapeouts, I'm passionate about pushing the boundaries of semiconductor technology to create cutting-edge solutions. My expertise lies at the intersection of IC design, low power custom ICs, RISC-V architecture, energy harvesting phenomena like Triboelectric Nano Generators, and AI-based Electronic Design Automation (EDA) tools.Key Highlights:Tapeout Success: I've contributed to and led multiple successful tapeouts, ensuring that designs meet strict specifications and performance requirements.Low Power Custom ICs: My area of expertise includes the design of low-power custom integrated circuits, optimizing energy efficiency for battery-powered and energy-constrained applications.RISC-V Architecture: I'm passionate about RISC-V, an open and extensible instruction set architecture, and I'm excited to explore its potential in future designs.Energy Harvesting: I'm intrigued by energy harvesting phenomena, particularly Triboelectric Nano Generators, and their applications in powering IoT devices and wearables.AI-Based EDA Tools: I stay at the forefront of technology by leveraging AI-based EDA tools to enhance the efficiency and quality of ASIC designs.Vision:I'm committed to shaping the future of electronics and semiconductor technology. My goal is to continue driving innovation in the ASIC design space, exploring novel applications of RISC-V, energy harvesting, and AI-driven design methodologies. I am dedicated to creating solutions that are not only efficient but also environmentally sustainable.Join me on this exciting journey of innovation and discovery in the world of ASIC and IC design.
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Asic Design EngineerStealth StartupIslamabad, Pk -
Asic Design EngineerStealth Startup Jan 2022 - PresentIslamabadGenerated front-end ASIC development, creating efficient designs with Cadence and Synopsys tools.Performed back-end tasks for Power Performance and Area.Conducted thorough verification using different methodology.Optimized power consumption with low-power design techniques.Developed Design for Test (DFT) strategies for better testability.Collaborated for smooth ASIC integration.Provided detailed documentation and progress reports. -
Research FellowshipFast-Nuces, Islamabad Campus Jan 2020 - Jan 2022Islāmābād, PakistanConducted research on mixed-signal design methodologies, focusing on efficient integration of analog and digital components.Led mixed-signal ASIC development projects, ensuring seamless collaboration between analog and digital teams.Implemented innovative mixed-signal architectures to meet project requirements and optimize performance.Utilized Cadence tools for both front-end and back-end design tasks, ensuring design integrity and functionality.Orchestrated comprehensive mixed-signal verification processes, validating design performance and functionality.Developed novel mixed-signal test strategies, enhancing test coverage and reliability.Collaborated closely with cross-functional teams to integrate mixed-signal designs into larger systems and applications. -
Digital Design EngineerPakistan Information Security Association (Pisa) Nov 2018 - Dec 2020Islamabad, PakistanASIC Design Leadership: Managed projects, integrated IP, and ensured reliability.Verification: Ensured robustness through rigorous validation.Low-Power Implementation: Optimized power without sacrificing performance.Collaboration: Worked closely with diverse teams for seamless integration.
M. W. Education Details
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Electrical And Electronics Engineering
Frequently Asked Questions about M. W.
What company does M. W. work for?
M. W. works for Stealth Startup
What is M. W.'s role at the current company?
M. W.'s current role is ASIC Design Engineer.
What schools did M. W. attend?
M. W. attended National University Of Computer And Emerging Sciences, Air University, Punjab Group Of Colleges.
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M Jahangir W
Director Recruitment And Key Accounts Hr - Client Sourcing At Al-Zuhayr Overseas EmploymentKarāchi
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