I have some achievements:- Fluent operation in Cadence tool (Virtuoso).- Handle custom analog and digital layout from leaf-cell, IP and CHIP level.- Have experience in analog technique: matching, reduce coupling and noise …- Expert in analyzing, fixing DRC, LVS, Antenna, ERC, WPE, LOD, PSE, OSE, EMIR… errors.- Good analysist and understand rule desk, rule document.- I have been finished OTP, Supper Flash, memBrain memory project with 180nm, 90nm, 65nm, 40nm process.- I’m very interested in learning new technology, always want to challenge yourself.