Experienced Asic Design Engineer with a demonstrated history of working in the semiconductors industry. Worked more than 10 years in digital design and verification of Video Encoding cores(HEVC, AVC), Image Signal Processors and wireless transceivers with embedded processor cores.• Deep understanding in the architecture definition of complex SOC chips with high-performance CPU, on-chip buses (AHB/AXI), HW/SW partitioning.• Expertise in digital micro-architecture, RTL design, functional verification, synthesis.• Excellent understanding of fixed-point models and conversion to RTL optimised for PPA. • Deep knowledge of multi-clock designs and CDC.• Strong C programming skills that was applied in hardware-firmware/SoC level verification.• Functional Verification/Validation, self-checking testbench development, knowledge of UVM concepts.• Formal verification using SVA (Jasper, Onespin). • EDA tools : Cadence(Xcelium, Genus), Synopsys(VCS, Design Compiler, Formality,Spyglass).• HDLs