Summary: FPGA Design and Verification, as well as DO254 consulting/project development. I designed & implemented a memory-to-LCD transfer engine which had extremely low-latency frame to frame data transfer requirements as the data loaded an LCD solid-state "mirror" with a steering pattern to point a laser beam and, also, orient an additional LCD to retrieve the resultant reflections for a LIDAR data display system targeted for the autonomous vehicle market. I completed a DO-254 compliant, Design Assurance Level (DAL) A, directed test bench in VHDL for a MACHX02 supporting a Single Board Computer running a NXP T2081 processor. 100% code coverage and gate simulation included. I wrote all documents (Test Procedure, Test Results, Problem Reports, Reviews); drove reviews to closure, interfaced with all stakeholders and provided DO-254 guidance as need for the project team.

FPGA/ASIC Design and VerificationUVM Testbench DevelopmentObsolescence PMSustaining EngineeringI have significant experience interfacing with TSO Certification Specialists/FAA DERs during Stage Of Involvement (SOI) audits of several projects.My last position was as a member of the Defense & Space ASIC/FPGA group working on military and NASA projects.I hold a secret security clearance.

I performed as a significant team member on both CDMA and GSM wireless systems development executing digital design for high reliability, field hot-swappable assemblies involving the following duties and skills:o Coding, synthesizing and simulating FPGA/CPLD logico Writing manufacturing test requirementso PCB schematics & layout design to standardso Defining & performing verification testso Component selection fulfilling system requirementso Test fixture design – engineering & productiono Contributing to project schedule contento Power supply designo Writing hardware design description documentso Thermal analysiso Production transition support

I was hired to re-architect a completely FPGA-based embedded real-time Force-Feedback Controller to an implementation utilizing a combination of FPGA’s and a 16-bit microcontroller to enhance flexibility in adding features and supporting new requirements.I wrote, debugged and maintained the embedded microcontroller software and FPGA designs. I also wrote the C++ code to verify/demo the system on a Windows OS platform. This code included an ASPI-compliant SCSI driver, supporting DOS, Windows/NT and Unix operating systems, replacing the existing RS232 interface to the host system, which increased the update rate of force-feedback information from 30-60 frames per second (fps) to over 400 fps resulting in significant smoothing of the control system latencies. This force-feedback controller embedded into a 3-D graphics-based physical-modeling simulator to present a realistic virtual environment to train medical personnel in the skills necessary to execute Endoscopic and Laparoscopic procedures.

I supported digital design engineers in all phases of development and implementation for new products targeted for the emerging ultrasound market. Specifically, I helped implement scan converter designs utilizing ten Xilinx FPGAs for three different ultrasound systems, two of which logged significant sales. These systems targeted mid- to very hi-end applications and set new standards for price-to-performance ratio in the market at that time.My duties included:o Schematic design entry for FPGA and PCB designso Prototyping circuits to validate designso PLD simulation and testingo Production design validationo Test-set design for manufacturing - hardware and softwareo System test and integrationo R&D lab organization and resource management