Iris Galvez

Iris Galvez Email and Phone Number

Capital Integrator at Intel @ Intel Corporation
santa clara, california, united states
Iris Galvez's Location
Albuquerque-Santa Fe Metropolitan Area, United States
Iris Galvez's Contact Details

Iris Galvez personal email

n/a
About Iris Galvez

Iris Galvez is a Capital Integrator at Intel at Intel Corporation. She possess expertise in semiconductors, design of experiments, jmp, semiconductor industry, spc and 20 more skills.

Iris Galvez's Current Company Details
Intel Corporation

Intel Corporation

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Capital Integrator at Intel
santa clara, california, united states
Website:
intel.com
Employees:
133841
Iris Galvez Work Experience Details
  • Intel Corporation
    Tmg Strategic Planning Capital Integrator
    Intel Corporation Jul 2021 - Present
    Albuquerque, New Mexico, United States
    Responsible for the integration of Intel's capital plans and targets into an executable strategy for manufacturing. Optimize the capital required to support near term revenue and longer-term strategic objectives for Intel.
  • Intel Corporation
    Team Lead - Technology Development Industrial Engineering
    Intel Corporation Jan 2019 - Jul 2021
    Rio Rancho, New Mexico
  • Independent Zumba Fitness Instructor
    Independent Zumba Fitness Instructor
    Independent Zumba Fitness Instructor Nov 2012 - Present
    ZIN licensed Zumba Instructor, teaching energetic Zumba classes full of Latin flavor and world rhythms.
  • Globalfoundries
    Lead Sourcing Manager (Capital Equipment)
    Globalfoundries Jan 2018 - Oct 2018
    Malta, Ny
    Own Capital Equipment (Capex), Parts and Maintenance sourcing for 4 different modules in F8/NE corridor of GLOBALFOUNDRIES, including negotiation of Parts and Spares pricing, Alternative Sourcing, and management of Maintenance, Consignment, Evaluation, JDP and other agreements. Develop, Align and Execute Commodity and Negotiation Strategies, and maintain key Contracts and Agreements with our Suppliers. Responsible for Strategic Supplier Management (SSM) and Risk Mitigation.
  • Globalfoundries
    Principal Engineer, Atd Infrastructure
    Globalfoundries May 2016 - Dec 2017
    Malta, Ny
    Owned capacity planning for the 7nm Development Corridor in F8. Focus on reduction of planned and tactical bottlenecks and reduction of OAK (One of a Kind) runpaths to enable quick development learning cycles. This included following the tools through the entire Capital Expenditure (CAPEX) Process, starting with developing the case/approval package for SOAK (Second of a Kind) tools, managing PO issuance, tool installation and qualification schedules, until capacity was ready to be used on the development line.
  • Globalfoundries
    Capital Expenditures Ie
    Globalfoundries Oct 2014 - May 2016
    Malta, Ny
    Owned capital planning for the Fab8 site in Malta, NY, including budgeting. Ensured all capital expenses were within budget for full build out and meet the desired capacity needs of the factory. Worked with different modules to track savings to plan, ensure best utilization of current equipment, and avoid future capital expenses through tool re-purposing and MOOI savings.
  • Intel Corporation
    Capacity Industrial Engineer
    Intel Corporation Jan 2012 - Sep 2014
    Albuquerque, New Mexico Area
    Own capacity analyses for Thin films and C4 areas, for 53 toolsets in total. Responsible for calculating the optimal number of tools required to meet the committed ramps and calculating capacity impacts of any process change. Provide module support by using statistics to analyze run rates, availability, utilization, etc, to understand any deviations from planned capacity and work as a team to create and execute roadmaps to close any gaps. Use same principles to free up capacity and save future capital expenditures.
  • Intel
    Metals Process Engineer
    Intel Nov 2008 - Jan 2012
    Lead Engineer responsible for improving defect performance, maximizing output, and increasing availability of AMAT Endura PVD equipment. Used equipment knowledge to troubleshoot and correct tool issues, and statistical analysis tools to optimize processing parameters. Led taskforces to eliminate defect sources which reduced defect related downtime by 35%. Increased availability of the equipment from 60% to 80% via implementation of process changes, elimination of unnecessary downtime activities and streamlining scheduled downtime events using lean practices.
  • Intel Corporation
    Defect Reduction Engineer
    Intel Corporation May 2004 - Nov 2008
    Defect formation and process expert for 300mm HVM facility. Used statistical analysis and process knowledge to identify and correct sources of defects. Led various engineering teams to implement process changes to reduce defects and meet factory yield goals. Through process improvements and excursion containments, reduced defect impact levels by 75% in the midsection of the line. Developed inline defect yield models to accurately predict impact of excursions. Prepared engineering analysis training materials for the Intel College of Engineering that are used across the organization. Improved the yield organization’s capabilities through training of engineers and technicians in the use of defect analysis tools, methods, and software. Mentored 7 junior engineers and engineering technicians in the group.

Iris Galvez Skills

Semiconductors Design Of Experiments Jmp Semiconductor Industry Spc Thin Films Process Engineering Manufacturing Failure Analysis Silicon Lean Manufacturing Engineering Yield Metrology Characterization Statistical Process Control Process Integration Cvd Pvd Ic Cmos Product Engineering Photolithography Process Simulation Plasma Etch

Iris Galvez Education Details

Frequently Asked Questions about Iris Galvez

What company does Iris Galvez work for?

Iris Galvez works for Intel Corporation

What is Iris Galvez's role at the current company?

Iris Galvez's current role is Capital Integrator at Intel.

What is Iris Galvez's email address?

Iris Galvez's email address is ir****@****ies.com

What schools did Iris Galvez attend?

Iris Galvez attended Michigan State University, Universidad De Puerto Rico - Recinto Universitario Mayaguez.

What skills is Iris Galvez known for?

Iris Galvez has skills like Semiconductors, Design Of Experiments, Jmp, Semiconductor Industry, Spc, Thin Films, Process Engineering, Manufacturing, Failure Analysis, Silicon, Lean Manufacturing, Engineering.

Who are Iris Galvez's colleagues?

Iris Galvez's colleagues are Akhilesh Tanneeru, Dmitry Kornev, Yaniv Brant, Rich Fahey, Dennis Paredez, Kevin A Rathman, Krishnakali Chaudhuri.

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