Isaac Ogunmola Email & Phone Number

Toronto, On, Ca

Oshawa, On, Ca

Toronto, Ontario, Canada

Markham, Ontario, Canada

• Developed and verified HTOL and Repair/Redundancy Allocation DVT patterns for Memory Built-In Self-Test logic. Synopsys VCS was used for simulation, and Synopsys Verdi was used for analysis and debug. The tests were successfully applied to dies on ATE during Wafer Sort.• Analyzed shmoo plots to determine and proffer solutions to failing dies during Wafer sort for MI300* products. This required detailed knowledge of CMOS Characteristics, Process Corners (ff, tt, ss), and Timing Violations (Setup and Hold).• Generated, organized, verified, and delivered 100+ files documenting the logical connectivity and physical coordinate information for millions of SRAM macros for two dies. This information was used to assess Engineering Change Requests (ECRs)• Extracted geometric information from LEF and DEF files to provide XY coordinates and logical connectivity of all data-carrying TSVs. This information was used to detect and inspect defective TSVs and alignment issues on leading TSMC nodes and packaging techniques.• Gained a detailed working knowledge of numerous IEEE standards like IEEE 1149.1 (JTAG), IEEE 1500, IEEE 1687 (IJTAG), and IEEE P1450 (STIL).• Used my knowledge of Physical Design, C++, Python, and Discrete Mathematics to build a tool that creates high-quality daisy chains comprised of 300+ macros in under 15 minutes while meeting stringent Physical and Logical Design rules. A human would take multiple hours (without a guarantee that design rules are met). This tool will be used to plan and implement SOC-wide Scan Chains and IEEE 1687 logic among other things. • Received a Certificate of Recognition for an outstanding performance as an AMD Intern.Skills: (System)Verilog RTL Design, Integration, and Design Verification (DV), ATE Silicon Debug, Shmoo plot analysis, C++, Python, TCL, Synopsys VCS and Verdi.

Oshawa, Ontario, Canada

𝗥𝗲𝘀𝗲𝗮𝗿𝗰𝗵 𝗔𝗿𝗲𝗮: Pruning in Deep Neural Networks 𝗦𝘂𝗽𝗲𝗿𝘃𝗶𝘀𝗼𝗿: Dr. Amirali Salehi-Abari.𝗔𝗰𝘁𝗶𝘃𝗶𝘁𝗶𝗲𝘀: • Developed and implemented Deep Neural Network architectures (including custom ResNets) in PyTorch to evaluate ideas and potentially publishable findings. Models were modified to evaluate several design trade-offs and enable data acquisition of different metrics from each structural entity in the network (i.e. weights, filters, kernels, Batch Normalization layers, dense layers, etc.). • Reviewed academic papers to critique, understand, modify, or implement ideas. • Wrote numerous reports detailing experimental designs, results, and analysis of various pruning algorithms. Principal Component Analysis (PCA) was often used for dimensionality reduction and exploratory data analysis. • Created visualizations to analyze and communicate model performance and hyper-parameter response for a wide variety of architectures and statistical learning techniques.• Explored statistical learning techniques like Decision Trees, K-Means Clustering, and others to evaluate ideas pertaining to an ensemble of classifiers.𝗧𝗼𝗼𝗹𝘀: • Python (NumPy, PyTorch, Matplotlib, Seaborn, Pandas, and many many more) • LaTeX • Linux

Oshawa, Ontario, Canada

• Assisted in developing a system for organizing stocked products at a new store to ensure accessibility and reduce health and safety hazards. • Resolved numerous customer complaints by listening to their concerns and providing professional feedback in a courteous and empathetic manner.

Bachelor Of Engineering - Be, Electrical Engineering

Bachelor Of Engineering - Be, Computer Engineering, Gpa: 5.0/5.0 (Alpha Semester)

Secondary School Diploma

Activities and Societies: Student Body President