Project Leader | Product Owner for facilitating the projects Strypes run with IT @ ASML.Main responsibilities:- define the projects goals, planning, priorities and estimates.- ramp up and facilitate the work of the remote team implementing the projects- acting as a bridge, between the various departments and aligning the work to be done.

Assigned as a Team Lead to a newly formed team.Working on a small migration project(few man months of work) to gain and build trust in the client.We were able to gather a good team that solved the technical challenges facing us. During the process I initiated direct communication with the client on daily basis, started negotiating/agreeing on project tasks and setting priorities, facilitating the process.Outcome: we managed to gain the trust of the client, extended the contract and… Show more Assigned as a Team Lead to a newly formed team.Working on a small migration project(few man months of work) to gain and build trust in the client.We were able to gather a good team that solved the technical challenges facing us. During the process I initiated direct communication with the client on daily basis, started negotiating/agreeing on project tasks and setting priorities, facilitating the process.Outcome: we managed to gain the trust of the client, extended the contract and got two major projects(couple of man years of work). Show less

Projects OMAP3430/4430/5430 (Multimedia chips): writing chapters for the Technical Reference Manuals (TRMs).Responsible for the Chapters: Memory Subsystem, Interconnects, Control Module and their programming models.

Acquired skills – UNIX, Verilog, Specman, TCL, Digital design and verification

"Phase Locked Loops ” – three months internship project, part of the designer course program at TU/e.

Part of my program in TU/eThe project included analog design of IC’s for the automotive industry, creating of behavioral simulation models on the base of Input/Output Buffer Information Specification (IBIS), investigation of EMC and ESD structures for safe design.

Internship master project thesis: “An efficient worst-case corner analysis optimization methodology for analog and RF design”

Application and design of innovations for the production line.