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Izak Walker Email & Phone Number
Digital Design Engineer
at
Astera Labs
LinkedIn matched
3 data sources
Profile completeness 86%
Current company
Role
Digital Design Engineer
Location
Santa Clara, California, United States
Company size
Who is Izak Walker? Overview
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Quick answer
Izak Walker is listed as Digital Design Engineer at Astera Labs, a company with 602 employees, based in Santa Clara, California, United States. AeroLeads shows a matched LinkedIn profile for Izak Walker.
Izak Walker previously worked as Systems Validation Engineer at Texas Instruments and Design Verification Engineer at Texas Instruments. Izak Walker holds Master Of Science, Electrical Engineering, 4.0 from California Polytechnic State University-San Luis Obispo.
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Astera Labs
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Profile bio
About Izak Walker
As a graduate with a Master of Science in Electrical Engineering from California Polytechnic State University, I've honed my expertise at Texas Instruments, currently as a Systems Validation Engineer. My core competencies lie in post-silicon system validation, Python automation, and cross-functional team collaboration, ensuring that high-speed FPD-Link IVI SerDes devices perform optimally across various conditions.In my role, I've identified system-level failures and spearheaded collaborative efforts for innovative solutions, contributing to the seamless integration of new technologies. My experience in design verification complements my validation skills, enabling me to debug and enhance test-benches effectively. I am driven by a commitment to excellence and a passion for fostering an environment of continuous learning and improvement, which resonates with our organizational culture and adds a diverse perspective to our team's endeavors.
Current workplace
Izak Walker's current company
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Astera Labs
4 roles
Izak Walker work experience
A career timeline built from the work history available for this profile.
Systems Validation Engineer
CurrentPost-silicon system level validation and characterization over PVT of high-speed FPD-Link IVI SerDes devices (End-to-end display functionality, DP link-training, DP compliance, and core DP features).Identified system-level failures and collaborated with cross-functional teams for possible solutions. \item Automated bench instruments, SerDes configuration.
Jun 2022 - Present
Design Verification Engineer
Pre-silicon design verification of high-speed FPD-Link IVI SerDes devices (PLL, I2C, I2S, and core DP features).Utilized SimVision to root-cause issues personally identified during silicon validationCadence vManager and SimVision based debugging to solve regression failuresCreated and modified existing SystemVerilog test-benches for verifying new RTL
Jun 2023 - Dec 2023
Application Engineer Intern
Published Solving Top Comparator Challenges: Chatter on ti.comhttps://www.ti.com/document-viewer/lit/html/SSZT122#:~:text=ChatterCreated PSpice and TINA TI simulation models for customer and internal use Answered customer technical questions regarding TI comparators via TI E2E forum
Jun 2021 - Sep 2021
Team & coworkers
Colleagues at Astera Labs
Other employees you can reach at asteralabs.com. View company contacts for 602 employees →
KV
Kevin Vermilion
Colleague at Astera Labs
San Francisco Bay Area, United States
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DS
Donald Schelle
Colleague at Astera Labs
Cambridge, Ontario, Canada, Canada
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MN
Mihir N.
Colleague at Astera Labs
Vancouver, British Columbia, Canada, Canada
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CL
Chris Lee
Colleague at Astera Labs
United States, United States
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KW
Kevin Wong
Colleague at Astera Labs
Metro Vancouver A, British Columbia, Canada, Canada
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PG
Pamela Gauci
Colleague at Astera Labs
San Francisco Bay Area, United States
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YP
Yuvan Provine
Colleague at Astera Labs
Fremont, California, United States, United States
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WC
Will Chai
Colleague at Astera Labs
Shanghai, China, China
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JA
Jade Adam
Colleague at Astera Labs
Jessore, Khulna, Bangladesh, Bangladesh
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SP
Sam Pan
Colleague at Astera Labs
Taiwan, Taiwan, Province Of China
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Kevin Vermilion
Colleague at Astera Labs
San Francisco Bay Area, United States
View →
DS
Donald Schelle
Colleague at Astera Labs
Cambridge, Ontario, Canada, Canada
View →
MN
Mihir N.
Colleague at Astera Labs
Vancouver, British Columbia, Canada, Canada
View →
CL
Chris Lee
Colleague at Astera Labs
United States, United States
View →
KW
Kevin Wong
Colleague at Astera Labs
Metro Vancouver A, British Columbia, Canada, Canada
View →
PG
Pamela Gauci
Colleague at Astera Labs
San Francisco Bay Area, United States
View →
YP
Yuvan Provine
Colleague at Astera Labs
Fremont, California, United States, United States
View →
WC
Will Chai
Colleague at Astera Labs
Shanghai, China, China
View →
JA
Jade Adam
Colleague at Astera Labs
Jessore, Khulna, Bangladesh, Bangladesh
View →
SP
Sam Pan
Colleague at Astera Labs
Taiwan, Taiwan, Province Of China
View →
2 education records
Izak Walker education
Master Of Science, Electrical Engineering, 4.0
Bachelor Of Science, Electrical Engineering, 3.71
FAQ
Frequently asked questions about Izak Walker
Quick answers generated from the profile data available on this page.
What company does Izak Walker work for?
Izak Walker works for Astera Labs.
What is Izak Walker's role at Astera Labs?
Izak Walker is listed as Digital Design Engineer at Astera Labs.
Where is Izak Walker based?
Izak Walker is based in Santa Clara, California, United States while working with Astera Labs.
What companies has Izak Walker worked for?
Izak Walker has worked for Astera Labs and Texas Instruments.
Who are Izak Walker's colleagues at Astera Labs?
Izak Walker's colleagues at Astera Labs include Kevin Vermilion, Donald Schelle, Mihir N., Chris Lee, and Kevin Wong.
How can I contact Izak Walker?
You can use AeroLeads to view verified contact signals for Izak Walker at Astera Labs, including work email, phone, and LinkedIn data when available.
What schools did Izak Walker attend?
Izak Walker holds Master Of Science, Electrical Engineering, 4.0 from California Polytechnic State University-San Luis Obispo.
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