Jack Edery personal email
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More than 20 years of experience in the Semiconductor ASIC and FPGA design industries. Strong experience with ASIC process from RTL to GDS.Deep-sub-micron (0.18u, 0.13u, 90nm, 65nm, 40nm, 28nm) System-on-Chip.System architecture in CPU environment (ARM, MIPS, ARC)IP integration and verification (ARM,AES, MIPS, USB2/3, PCI-Ex, DDR2/3, etc.)Test program and test hardware development and debug Extensive managerial experience of large multidisciplinary teams(30 engineers ) in a dynamic companies. Lot of experience in large design and complex systems and solutions, from management, architecture to the last detail. Vast experience in telecom protocols (SDR,Modem,MAC,Ethernet,USB,PCIe,MaxBus,I2C,Uart,SPI etc..) ,Image Processing (camera sensor ,FLIR system ) and SoC (VLSI & FPGA). Having spent over 8 years of my career at Defense Company in roles include FPGA manager ,
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Idf UnitIsrael Defense ForcesIsrael -
Idf UnitIsrael Defense Forces Jan 2022 - Present -
Founder And General Manager R&D At ElipproElippro Feb 2016 - Sep 2022Jerusalem, Israel•Managing multidisciplinary projects from requirements to delivery of the product.•Managing ASIC projects from requirements to RTL to NetList and verification UVM..•Overall responsibility for on time delivery .•Strong system engineering capabilities. Good understanding of risk and requirement management. •Managing R&D teams verification and design•Management & leadership capabilities Both Engineers & Subcontractors •Extensive VHDL\Verilog FPGA design (Altera & Xilinx) •Use all tools for FPGA design (Lattice,Altera,and Xilinx)•Developing Verification environments in System Verilog/OVM/UVM and Verilog/VHDL
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Digital Group ManagerCommtact Ltd. Feb 2019 - Apr 2020SDR platform based on FPGA , multidisciplinary system -
Director Of R&DVeriest Jan 2014 - Feb 2016Tel AvivDirector of R&DASIC/FPGA and Verification design house. -
Asic Team LeaderIntel Corporation Jan 2012 - Jan 2014Israel -
Vp Asic/Fpga Manager DeptSamsung Israel R&D Center - Sirc Jan 2010 - Jan 2012Ramat GanResponsible of all FPGA department at SAMSUNG,emulation ,new methodology for FPGA flow.Team leader managing FPGA groupManagement & leadership capabilities experience in high speed / image processing /camera/datapath complex ASIC/FPGA designs Design SoC ,ARM,AXI,AHB,APB,DDR3 Silicon HW architect -
System EngineerElta Jan 2008 - Apr 2010System Engineer and Project Manager Electronic warfare systems (EWS) and EA -
Team Leader Logic DesignElta Apr 2004 - Jan 2008Team Leader ,Logic Design at ELTA 2005-2008Electronic warfare systems (EWS) and EA
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Team Leader Asic/FpgaBroadcom May 2000 - Apr 2004JerusalemCable Modem MAC & PHY -
Chip Design Engineer & Test EngineerTower Semiconductor Jan 1998 - May 2000
Jack Edery Skills
Jack Edery Education Details
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Master Of Business Administration - Mba -
Electronic-Communication
Frequently Asked Questions about Jack Edery
What company does Jack Edery work for?
Jack Edery works for Israel Defense Forces
What is Jack Edery's role at the current company?
Jack Edery's current role is IDF Unit.
What is Jack Edery's email address?
Jack Edery's email address is ed****@****ail.com
What schools did Jack Edery attend?
Jack Edery attended Tel Aviv University, Tel Aviv University.
What skills is Jack Edery known for?
Jack Edery has skills like Integration, Functional Verification, Asic, Fpga, Verilog, Vhdl, Logic Design, Testing, Embedded Systems, Debugging, System Architecture, Electrical Engineering.
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