In this role I am responsible for:* Designing architectural overviews based on the requirements documents* Actively taking the lead on presenting the progress of the team to the stakeholders* Coaching junior firmware designers* Keep track of the project planning and discuss the planning and progress with management* Develop and implement firmware for our project* Align our goals with the product owner* Actively take place in the selection of new team members

Currently I am working on the firmware for an FPGA on a newly developed board for ASML.Keywords:- Intel Arria10- FPGA- VHDL- SystemVerilog- Modelsim

For this (short) assignment I am working on the firmware for the Neuron project of Axon. The goal is to implement an interface to an existing Precision Timing Protocol (PTP) IP-core so it can be easily adopted by the rest of the system.My personal goal is to make sure that from, a system point of view, minimum changes are required when it comes to the other parts of the system. By having short lines to software engineers and other FPGA designers, I am trying to setup a design that fits… Show more For this (short) assignment I am working on the firmware for the Neuron project of Axon. The goal is to implement an interface to an existing Precision Timing Protocol (PTP) IP-core so it can be easily adopted by the rest of the system.My personal goal is to make sure that from, a system point of view, minimum changes are required when it comes to the other parts of the system. By having short lines to software engineers and other FPGA designers, I am trying to setup a design that fits within the needs of Axon within the limited amount of time there is.Keywords:- Xilinx- Vivado- PTP- ModelSim- VHDL- Python Show less

Currently active as firmware designer @ ASML. The goal of this project to create a future proof design which requires to be a one on one replacement for existing modules of the ASML machines.Keywords:- Intel Platform Designer- Mentor Graphics QuestaSim- Altera Arria10

Developing new products, implementing HDL IP-cores, verification and simulation of large FPGA-designs. Active member of the hardware-development team.Keywords:- Lattice MachXO2- Xilinx- ModelSim

Writing VHDL code, resolving analog electronics challenges.

The wish for high-speed dataprocessing is increasing and many software applications are being ported to an FPGA for parallel processing.During this assignment I am writing VHDL-source for the implementation of the SHA256-algorithm as specified by Federal Information Processing Standards–institute (FIPS). The goal is to calculate the SHA256-digest in the least possible clock-cycles as possible and to create a design which can run at a 150 MHz clock in the least.Next to this assignment I… Show more The wish for high-speed dataprocessing is increasing and many software applications are being ported to an FPGA for parallel processing.During this assignment I am writing VHDL-source for the implementation of the SHA256-algorithm as specified by Federal Information Processing Standards–institute (FIPS). The goal is to calculate the SHA256-digest in the least possible clock-cycles as possible and to create a design which can run at a 150 MHz clock in the least.Next to this assignment I implemented a BCH-encoder in order to recover corrupted data and see whether the quality of a data-link was ok. Show less

Creating FPGA-content for an RFID reader. During this project I created a UART-device in Xilinx System Generator. This assignment contained implementing a protocol as agreed by the customer and TOPIC.Other assignments I did in this project were implementing a CRC-8 and CRC-16 algorithm.Together with the architect of the design I implemented an algorithm to detect a data-signal in a noisy environment without loss of quality of the signal.

As hardware engineer, I was asked to create an adapter PCB between two different platforms. A printer was about to be redesigned and as a proof of concept, old hardware was to be driven by new hardware. This means a challenging assignment in which designing schematics and taking over old functionality of an old microprocessor into an FPGA.

Making a prototype for ambient lighting. This is a short project in which I am making a prototype for demonstration purposes.

Implemented a driver for controlling an inkjet-printhead cartridge in an FPGA. The purpose of this assignment was to make a prototype of an inkjet-printer so a research-team could investigate the aspects of a new kind of inkjet-printhead. Data was offered on the input of the FPGA and the FPGA had to process this data and send it into the right format to the inkjetprinter so it would draw the right patterns.

Hardware engineer:Resolving bugs in existing products for customers.

During this graduation project, a low-level automotive driver was analyzed with help of an IDE with capabilities of analyzing duration of instructions performed in a microprocessor. The goal of this assignment was to analyze an existing driver in order to get a good view of the duration of handeling an interrupt when that driver was executed. In a report an overiew was created so the bottlenecks could be analyzed and eliminated.

For this intership, together with a classmate, I did some research for an existing device. My internship coach developed a device with which it is possible to download a video-frame to a pc, so it can be examined to see if the quality of the camera is according to the pre-defined specifications. Since downloading large frames to a pc went relatively slow, we tried to see if the current processor that was on the board could be replaced by a NIOS II processor on a high speed.