ICPC for ECE 551 - Digital System Design and Synthesis

Worked in Full Chip Verification- Developed Python scripts to systematically analyze the execution times of tasks invoked by fullchip build script.- Collaborated with unit teams to remove unneeded dependencies within script resulting in 5% decrease of build time.- Modified Verilog and Makefile code to exclude redundant content from build resulting in 10% decrease in VCS compile time.- Monitored breakdown of critical path times with Perl and Python scripts in order to discover bottlenecks within build.

Worked in Post-Silicon Validation- Designed and automated IDDQ test flow in Ruby with Test Program Generation Framework (TPGF) built from Origen API to run on Advantest V93K automatic testing equipment (ATE).- Analyzed current measurement and test time data using Excel and PowerBI to optimize tests.- Updated PartFinder program in Python for upcoming products to sort specified chips on ATE testers.- Developed RMA program with TPGF and Python to unlock and test fused chips returned from customers.- Debugged JTAG and ATPG pattern fails and reported findings back to DV for further inspection.

- Ported PERFECT benchmarks to a C++ simulator that models an intermittent computing microcontroller platform with an Arm-M0+ CPU core.- Evaluated the benchmarks in the simulator using automated testing through python scripts.- Developed a systolic array-based convolution neural network (CNN) accelerator that performs dense matrix multiplications in Verilog and verified its functional correctness in ModelSim using a test bench.

UGSA for ECE 252 - Intro to Computer Engineering- Worked with professor Joshua San Miguel in teaching ECE 252 - Introduction to Computer Engineering.- Assisted students in a class of 70+ on various topics that cover assembly language programming, logic design, and computer organization.