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James Naegle Email & Phone Number

Principal Electrical Engineer at Astronics AES at Astronics AES
Location: Kirkland, Washington, United States 5 work roles 2 schools
1 work email found @ballardtech.com LinkedIn matched
✓ Verified May 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email

Work email j****@ballardtech.com
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Current company
Role
Principal Electrical Engineer at Astronics AES
Location
Kirkland, Washington, United States

Who is James Naegle? Overview

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Quick answer

James Naegle is listed as Principal Electrical Engineer at Astronics AES at Astronics AES, based in Kirkland, Washington, United States. AeroLeads shows a work email signal at ballardtech.com and a matched LinkedIn profile for James Naegle.

James Naegle previously worked as Principal Electrical Engineer at Astronics Aes and Senior Digital Design Engineer at Ballard Technology, Inc.. James Naegle holds Master Of Science, Electrical Engineering from University Of Southern California.

Company email context

Email format at Astronics AES

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{first}.{last}@ballardtech.com
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AeroLeads found 1 current-domain work email signal for James Naegle. Compare company email patterns before reaching out.

Profile bio

About James Naegle

MSEE with over twelve years of digital hardware development experience ranging from early requirement and specification generation to the actual design, simulation, implementation and lab based test of both chip and board level developments.Specialties: FPGA design, simulation, and implementation. logic design, hardware test, specification and requirement generation, verilog, tcl,

Listed skills include Fpga, Verilog, Simulations, Hardware Architecture, and 27 others.

Current workplace

James Naegle's current company

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Astronics AES
Astronics Aes
Principal Electrical Engineer at Astronics AES
AeroLeads page
5 roles

James Naegle work experience

A career timeline built from the work history available for this profile.

Principal Electrical Engineer

Current

Kirkland, WA, US

FPGA DesignIP DevelopmentTiming Closure and Analysis

Mar 2022 - Present

Senior Digital Design Engineer

Everett, Washington, US

FPGA DesignIP DevelopmentTiming Closure and Analysis

Mar 2014 - Mar 2022

Hardware Design Engineer

Pasadena, CA, US

- FPGA design, implementation and test- Design debug and problem solving- Board level design and implementation- Specification and requirement generation

Aug 2002 - Mar 2014

Engineering Co-Op Intern

Pasadena, CA, US

ASIC formal verificationSEU analysis for custom ASIC.

Jan 2001 - Jan 2002

Engineering Intern

Hewlett-Packard Corporation

Designed a crossbar switch for an Itanium class processor.

Jun 2001 - Sep 2001
2 education records

James Naegle education

Master Of Science, Electrical Engineering

University Of Southern California

Bachelor Of Science, Electrical Engineering

University Of Washington
FAQ

Frequently asked questions about James Naegle

Quick answers generated from the profile data available on this page.

What company does James Naegle work for?

James Naegle works for Astronics AES.

What is James Naegle's role at Astronics AES?

James Naegle is listed as Principal Electrical Engineer at Astronics AES at Astronics AES.

What is James Naegle's email address?

AeroLeads has found 1 work email signal at @ballardtech.com for James Naegle at Astronics AES.

Where is James Naegle based?

James Naegle is based in Kirkland, Washington, United States while working with Astronics AES.

What companies has James Naegle worked for?

James Naegle has worked for Astronics Aes, Ballard Technology, Inc., Jet Propulsion Laboratory, and Hewlett-Packard Corporation.

How can I contact James Naegle?

You can use AeroLeads to view verified contact signals for James Naegle at Astronics AES, including work email, phone, and LinkedIn data when available.

What schools did James Naegle attend?

James Naegle holds Master Of Science, Electrical Engineering from University Of Southern California.

What skills is James Naegle known for?

James Naegle is listed with skills including Fpga, Verilog, Simulations, Hardware Architecture, Xilinx, Testing, Asic, and Debugging.

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