Jason Hammer Email & Phone Number

Boise, Idaho, Us

Steward SIG’s Project Prioritization and Approval process and lead a team of Product Managers that are responsible for coordinating product teams (matrix organization) to execute SIG’s product plans.Oversee projects from the planning stage through qualification and product ramp in accordance with SIG and Micron’s Product Lifecycle Management process. Define Product Manager scope between Boise centric prototyping and New Product Introduction with Penang-centric volume manufacturing while applying continuous improvements to processes and responsibilities.Accountable for the overall product ownership driven through the product teams, which are accountable for the overall health of the product portfolio and associated business metrics. This includes schedules and phase gates to the critical process steps to maximize the confidence and successfully enable high volume manufacturing of the product to the selected Contract Manufacturer. Team of PMs lead collaborative relationships with several cross-functional working groups and internal Micron customers to ensure a high degree of transparency, clarity and aligned execution to Micron and SIG business processes.• Own the process for approving and prioritizing projects to determine the benefit and the opportunity cost of doing a project, while also working with Design to estimate the impact on other projects• Capture product requirements in close cooperation with the respective technical and BU (Business Unit) representatives.• Drive an alignment process of product development targets with Engineering, Manufacturing, and internal/external stakeholders to establish a project schedule as the single source of truth• Confirm availability of resources required to achieve the goals of the project and drive closure of gaps.• Ensure products are delivered on-time, one-time, every time• Provide regular updates on comprehensive SIG roadmap to ensure expectations for functionality, cost, resourcing, and schedule are aligned

Oo

Develop, qualify, and release new Power Management semiconductor products while also maintaining an active portfolio of released products. Focused on NPI, improving yields and maintaining quality for all assigned products to ensure customer expectations are exceeded. Interface with Design, Applications, Test, Packaging, Reliability, Operations and Quality Engineering teams.· Ownership of Product Engineering deliverables for New Product Introduction efforts. Ensure on time completion of deliverables to meet project schedules for Power Management technology products. · Support NPI Test Engineering activities to debug, validate and release production test hardware/software.· Compile and analyze data using common statistical techniques (time-series analysis, CPK, SPC, ANOVA) and effectively present key results along with recommended actions.· Analyze products to ensure manufacturability and data sheet compliance, including setting the optimal test screening limits, guard-bands, and outlier controls in production test plans.· Provide thorough and detailed test data analysis on each key NPI design revision during product development and identify key parameters for improvement.· Develop test plans for prototype and production electrical testing of wafer level and packaged devices with the goal to minimize test costs by implementing test time reduction and test efficiency methods.· Disposition test yield excursions using data derived from data analysis tools.· Practice continuous improvement and yield optimization by tracking test parameters, identifying outliers, uncovering correlations, and troubleshooting process and equipment issues.· Support Design and Quality teams on product qualifications, failure analysis, customer returns and alternate vendor sourcing approvals.· Employ appropriate Statistical Process Control (SPC) principles to reduce variability in product performance.

Waukesha, Wi, Us

Responsible for the day to day supervision of a Technical Support Team for solar inverter/battery backup systems. Answer in-bound calls from Technicians and answer questions over the phone. Gather and prepare documentation regarding product failure. Analyze failure modes to assist in determining root cause. Troubleshoot with dealer technicians how to navigate Generac’s warranty systems and submit claims electronically. Serve as technical expert for team and escalated calls. Select, coach and develop staff. Set clear expectations to inspire and motivate the team. Manage performance -- recognize achievement, provide feedback and administer progressive discipline when necessary. Track and create reports on specific key performance indicators. Report to Director - Technical Service.

Boise, Idaho, Us

Architect of SIG's Test Equipment roadmap. Working with all of SIG's customers and partners to understand their requirements, and then working with SIG Design and Operations to define an achievable roadmap that best meets those needs.•Working with SIG's customers (Planning, Sites, PE, QA) and SIG's partners (Test Engineering and Equipment Engineering) to explore opportunities where SIG's innovation can make a significant impact.•Owning SIG's process for approving and prioritizing projects by working with the larger Micron community to determine the benefit and the opportunity cost of doing a project, while also working with Design to estimate the impact on other projects.•Collaborating with TSE Equipment Engineering to improve the tester roadmap through integration.•Working with SIG Operations to set NPI priorities, helping to ensure SIG products are delivered on-time, one-time, every time.•Providing regular updates on SIG's roadmap to SIG's world-wide customer base. Ensuring that expectations for functionality, cost, and schedule are aligned.

Boise, Idaho, Us

Perform Electrical Characterization• Operate bench tester for fault isolation. • Understand the physical layout of the part• Characterize backend test failures• Use schematic/layout to correlate failures when necessary• Understand various PFA techniques available for deprocessing failuresProvide Data Analysis• Understand backend test flows and methodologies• Expert understanding of backend test extraction tools (TC tools)• Proficient in fab and probe data extractions for data analysis• Analyze SWRs, conversions, excursions to give timely feedback to the appropriate groups• Generate a weekly pareto of top backend yield issues and associated defects• Monitor reliability metrics and identifies top reliability concerns in the backend• Correlate backend yield metrics to probe/param/RDA metricsOriginate Communication/Part Management• Generate an organized and efficient weekly PYE product report for feedback to the fab• Lead a weekly product meeting with the appropriate audience to discuss the backend yield status of the part• Request and follow up on action items to address top backend yield or reliability pareto items• Generate organized and timely yield analysis reports with clear recommendations

Boise, Idaho, Us

Lead the team of program managers that drive cross functional product development teams to execute on schedules, scope, budget, and cost for Micron's NAND and Managed NAND products. Drive consistency, efficiency and best in class methods for product development teams and business units. Facilitate a cross-BU roadmap process to handle changes and additions to our NAND portfolio.

Boise, Idaho, Us

Responsible for expense budget, capital expenditure, headcount, resource, and space planning for ~1000 employee department across multiple sites in the US, Europe, and Asia. Update executive dashboards and metrics, create and drive new strategic actions for CEO and staff. Departmental process owner for IATF/DEKRA audit compliance. Manage the Planning team, which is responsible for engineering samples (internal and external), part type setup, and supply chain integration. Manage the Database team, which includes the Verilog/SPICE CAD environment for the department, as well as layout, design rule checks, and tapeout of reticles for all non-volatile products. Technologies include NAND and NOR Flash, SSD, Managed NAND, and Emerging Non-Volatile memories.

Boise, Idaho, Us

Directed all aspects of development, qualification and manufacturing of NAND Flash memory at Micron. Vertically integrated with internal SSD and Managed NAND groups through schedules, timelines, cost, and technical collaboration. Executed to performance indicators, operating goals, realignment initiatives, productivity improvements, and cost reduction programs that consistently improved product output and quality. Groups included product debug, planning, program managers (ProChain schedule management), reliability (chip and package), database and layout management, Verilog and HSPICE simulation, electrical competitor analysis, front to back end testing, characterization, and software. Managed 9 direct reports and ~140 indirect reports. Boise team scope is development of alpha products for each process node as well as some of the derivative products. Owned and maintained a $100 million annual department budget, as well as headcount planning for Boise teams. Team was responsible for training and rollout of BKM's and alpha product learnings to other worldwide PE teams in California, Singapore, and Italy. Reported to Vice President of Non-Volatile Memory Product Engineering.

Boise, Idaho, Us

Managed a portfolio of SLC and MLC NAND Flash products from cradle to grave. Oversaw staff of 6 direct reports and 20 indirect reports. Reported to Director of NSG Product Engineering.

Boise, Idaho, Us

Managed several SLC, MLC, and TLC NAND Flash products from cradle to grave. Oversaw staff of 3 direct reports and 12 indirect reports.

Boise, Idaho, Us

One year assignment at Manassas, VA silicon wafer fab. Managed a team whose charter was to foster and train a new product quality assurance engineering team as well as providing on-site product engineering guidance to the fab process integration, yield enhancement, and probe test teams.

Boise, Idaho, Us

Led several DRAM products from cradle to grave. Oversaw a team of 4 engineers. Responsible for debug, testing, reliability, qualification, system validation, and sample delivery to internal and external customers.

Boise, Idaho, Us

Debug, simulation, and testing of DRAM memory. Advantest and Teradyne testers, microprobing, Verilog and HSPICE simulations.

Boise, Idaho, Us

Internship as a competitor analysis engineer. Duties included electrical bench characterization, circuit readback, and physical silicon deprocessing.