Jay Platt Email and Phone Number
Jay Platt work email
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Jay Platt personal email
Experienced Hardware Design Engineer with a demonstrated history of working in the defense, medical, oil and gas, telecommunications, and utility industries. Skilled in Electronics, Power Transmission, Power Electronics, High-speed Digital Design, FPGAs, and Electrical Engineering. Strong engineering professional with a BSEE focused in Electrical and Electronics Engineering from Purdue University.
Bascom Hunter
View- Website:
- bascomhunter.com
- Employees:
- 73
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Bascom HunterBaton Rouge, Louisiana, United States -
Hardware Engineering ManagerGlobalstar Mar 2020 - PresentCovington, La, Us -
Sr. Hardware Design EngineerGlobalstar Jan 2015 - Mar 2020Covington, La, Us* Design High Speed (1GHz), multiprocessor based hardware to serve as a WiFi to satellite router for voice and data communications.* Design the overall digital system architecture.* Perform Signal Integrity Analysis in high speed digital data.* Integrate with TI AM3358, DDR3, EMMC, and Custom Asics* Design programmable Logic using Silego Green Pak parts and tools.* Design and test Li-Ion Battery charging solutions.* Test for RF Receiver sensitivity.* Test for EMI (FCC Part 15 Class B) -
Staff Electrical Design EngineerIon Geophysical May 2012 - Dec 2014Houston, Texas, Us* Design power systems and digital circuitry for data acquisition and telemetry on 12 KM long undersea seismic cables.* Design a 1200V to 15 V DC:DC converted to power individual sensor nodes along a 12 KM cable.* Design Seismic Data Acquisition hardware capable of utilizing the full resolution of 24 bit Delta-Sigma ADCs.* Design the FPGA glue logic for the Seismic Acquisition hardware.* Design an FPGA based solution (Altera NIOS II) to replace aging DSPs with custom hard filtering.* Debug an FPGA based telemetry system for sending 8b/10b coded data over long distances with tight timing controls.* Test seismic cables in the field. -
Sr. Design EngineerFlir Systems May 2010 - Apr 2012Wilsonville, Or, Us* Design Near and long range 6 axis thermal imaging cameras.* Design High Speed Digital circuitry to process direct digital and RS170 video using custom FPGAs and a Ti Davinci video processor.* Design FPGAs for video processing and Focus / Zoom / Position control using verilog.* Implement PID control loops in custom FPGA logic for Focus / Zoom and Position control of a multi axis camera.* Write C for real time firmware for embedded M4 microprocessors -
Sr. Design EngineerDatamax-Oneil Corp Oct 2008 - Feb 2010* Design control Logic and power supplies for thermal barcode printers.* Design FPGAs to control the thermal printer in VHDL.
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Sr. Digital Design EngineerInvivo Corporation Nov 2005 - Sep 2008Gainesville, Fl, Us* Design MRI based patient monitoring equipment * Design to UL 60601 for Medical Equipment safety.* Design System on Chip circuits using Xilinx FPGAs and Microblaze Microprocessors using verilog* Design System on Chip circuits using Altera FPGAs and NIOS II Microprocessors using verilog* Implement asymmetric multi-core microprocessor architectures in both Xilinx and Altera FPGAs* Simulate FPGA designs using Modelsim* Design wireless circuits to operate in the 2.4 GHz band, 1m Baud -
Sr. Design EngineerDme, Inc. Feb 2002 - Nov 2005* Create contract requirements, Scope of Work and Customer Acceptance Criteria / Tests* Act as the direct Customer Liason* Manage entire projects including budgets, schedules, and junior engineers* Design Automated Test Equipment Cards to upgrade the Javelin Missile test station. * Program interfaces and multiple FPGAs in VHDL for the Javelin Test Station* Design Real Time Video over USB 2.0 from the Javelin Command Launch Unit
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Sr. Design EngineerSuperchips Feb 2002 - Nov 2002Us* Design an FPGA to ASIC implementation of the Ford J1850 automotive interface.* Design FPGAs in verilog* Simulate FPGAs in verilog with Modelsim* Reverse Engineer Dodge Power Control Module security logic -
Sr. Design EngineerAdaptec Is Now Microsemi May 2000 - Jul 2001Us* Design PCI / CPCI based SCSI and IDE RAID controllers for computer servers.* Design CPLD glue logic in verilog for Altera CPLDs.* Perform signal Integrity analysis in high speed digital circuits. -
Design EngineerSiemens Sep 1996 - May 2000* Design inverter based power electronics for UPS and VAR compensation on Utility circuits, 2 - 20 MVAR, upto 69 KV.* Design, specify and test medium voltage transformers, switch gear, and controls to 69KV * Simulate Control Loops and Power Electronics * Design and simulate analog / digital (microprocessor and gate array) and power circuits* Program embedded microprocessors in C and assembly* Provide customer training and field support for on site installations of end user equipment
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Design EngineerEaton Cutler Hammer Aug 1993 - Sep 1996* Design Variable Frequency Motor Drives and Solid State Motor Starters, 35 Hp to 1200 Hp, 480V - 575 V* Simulate Control Loops and Power Electronics * Perform DFMEA analysis and agency testing / validation (UL / CSA to UL 508.E)* Design and build test fixtures for product manufacturing* Design custom electrical panels
Jay Platt Skills
Jay Platt Education Details
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Purdue UniversityElectrical And Electronics Engineering
Frequently Asked Questions about Jay Platt
What company does Jay Platt work for?
Jay Platt works for Bascom Hunter
What is Jay Platt's role at the current company?
Jay Platt's current role is Hardware Engineering Manager at Globalstar.
What is Jay Platt's email address?
Jay Platt's email address is ja****@****tar.com
What schools did Jay Platt attend?
Jay Platt attended Purdue University.
What skills is Jay Platt known for?
Jay Platt has skills like Field Programmable Gate Arrays, Electronics, Electrical Engineering, Design For Manufacturing, Xilinx, Arm Architecture, High Speed Digital Design, Power Electronics, Digital Circuit Design, Electronic Circuit Design, Engineering, Altium Designer.
Who are Jay Platt's colleagues?
Jay Platt's colleagues are Mason Wooton, Britney Baxter, Nicholas Soures, Robert Duke, Stacey Mccarthy, Leigh Redman, Timothy Curol.
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