Jay Roy

Jay Roy Email and Phone Number

Chief Architect/Fellow, Low Power at Synopsys Inc @ Synopsys Inc
Jay Roy's Location
San Jose, California, United States, United States
Jay Roy's Contact Details

Jay Roy personal email

n/a
About Jay Roy

Technologist with 30 years of experience building cutting edge EDA power tools, helping semi customers achieve significant power savings. My journey through tech node evolution from 130nm to 2nm, now approaching Angstrom level, and having worked with a broad spectrum of semi companies has given me deep insight into the power flows challenges and solutions. Key Achievements -- Founded 2 EDA startups: TriQuest Design Automation & Zenasis Technologies- Built 6 EDA products: ZeBu Empower, PrimePower-RTL 2.0, Joules, ZenTime, HDLScore, ViewFSM- Managed 3 other power products: PrimePower-RTL, SpyGlass-PE, & PowerArtist- Helped AI, CPU, GPU, Mobile customers achive significant power savings- Deep insight into power flows and challenges from broad spectrum of semi companiesAwards & Recognitions -- 2023 25% power savings in Mobile chip- 2022 15W power savings in Server chip- 2021 2.5x boost in FPS in AI chip- 2017 Cadence DSG Superstar- 2012 Ansys, PowerArtist fastest growth- 2003 Zenasis Top 50 fastest growing- 1998 Summit, HDLScore fastest growth- 1994 Viewlogic, Engineering Excellence- 1991 Best Paper, VHDL User’s Group Conf- 4 Patents, 20+ Journal & Tech Publications

Jay Roy's Current Company Details
Synopsys Inc

Synopsys Inc

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Chief Architect/Fellow, Low Power at Synopsys Inc
Jay Roy Work Experience Details
  • Synopsys Inc
    Chief Architect, Power Continuum
    Synopsys Inc Nov 2021 - Present
    Sunnyvale, California, Us
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  • Synopsys Inc
    Group Director, Soc Power Continuum
    Synopsys Inc May 2018 - Nov 2021
    Sunnyvale, California, Us
    Power is the next frontier for SOC designs. There is need for integration across Verification (activity generation), Implementation (block level typical activity for power optimization), and Signoff (small window ~1K cycles of SOC activity for peak power, IR drop, Thermal analysis). RTL Power estimation is the fulcrum that ties these areas of chip design.
    View
  • Cadence Design Systems
    Group Director, Rtl Power
    Cadence Design Systems Mar 2013 - Present
    Built Joules, a power calculator for RTL and Gates.
  • Ansys Apache
    Senior Director, Rtl Power
    Ansys Apache Oct 2010 - Mar 2013
    RTL Power Analysis and Optimization
  • Cadence Design Systems
    Consultant To The Office Of Cto
    Cadence Design Systems Dec 2007 - Oct 2008
  • Zenasis Technologies
    President
    Zenasis Technologies 2000 - 2007
  • Sun Microsystems
    Sr. Manager, Design Technology Group
    Sun Microsystems May 1999 - Oct 2000
    Palo Alto, Ca, Us
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  • Summit Design & Productions
    Vp Rtl Analysis & Optimization Tools
    Summit Design & Productions Mar 1997 - May 1999
    Ca
    View
  • Triquest Design Automation
    Vp Engineering
    Triquest Design Automation Feb 1995 - Feb 1997
  • Viewlogic Systems
    Principal Engineer
    Viewlogic Systems Mar 1993 - Feb 1995

Jay Roy Skills

Semiconductors Eda Asic Soc Ic Verilog Vlsi Embedded Systems Mixed Signal Fpga Tcl Perl Simulations Product Management Product Marketing Software Development Application Specific Integrated Circuits System On A Chip Algorithms Circuit Design Cmos Cross Functional Team Leadership Debugging Digital Signal Processors Analog Microprocessors Integrated Circuit Design Hardware Architecture Product Development Start Ups Strategic Partnerships Integrated Circuits Rtl Design C Logic Synthesis Early Stage Startups Algorithm Development Software Software Product Management Offshore Software Development Vhdl

Jay Roy Education Details

  • University Of Cincinnati
    University Of Cincinnati
    Computer Engineering
  • Indian Institute Of Technology, Kharagpur
    Indian Institute Of Technology, Kharagpur
    Electronics And Communications Engineering

Frequently Asked Questions about Jay Roy

What company does Jay Roy work for?

Jay Roy works for Synopsys Inc

What is Jay Roy's role at the current company?

Jay Roy's current role is Chief Architect/Fellow, Low Power at Synopsys Inc.

What is Jay Roy's email address?

Jay Roy's email address is ja****@****sys.com

What schools did Jay Roy attend?

Jay Roy attended University Of Cincinnati, Indian Institute Of Technology, Kharagpur.

What skills is Jay Roy known for?

Jay Roy has skills like Semiconductors, Eda, Asic, Soc, Ic, Verilog, Vlsi, Embedded Systems, Mixed Signal, Fpga, Tcl, Perl.

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