Jay Roy Email & Phone Number
@synopsys.com
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Who is Jay Roy? Overview
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Jay Roy is listed as Chief Architect, Power Continuum at Synopsys Inc, based in San Jose, California, United States. AeroLeads shows a work email signal at synopsys.com and a matched LinkedIn profile for Jay Roy.
Jay Roy previously worked as Group Director, SOC Power Continuum at Synopsys Inc and Group Director, RTL Power at Cadence Design Systems. Jay Roy holds Doctor Of Philosophy - Phd, Computer Engineering from University Of Cincinnati.
Email format at Synopsys Inc
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AeroLeads found 1 current-domain work email signal for Jay Roy. Compare company email patterns before reaching out.
About Jay Roy
Technologist with 30 years of experience building cutting edge EDA power tools, helping semi customers achieve significant power savings. My journey through tech node evolution from 130nm to 2nm, now approaching Angstrom level, and having worked with a broad spectrum of semi companies has given me deep insight into the power flows challenges and solutions. Key Achievements -- Founded 2 EDA startups: TriQuest Design Automation & Zenasis Technologies- Built 6 EDA products: ZeBu Empower, PrimePower-RTL 2.0, Joules, ZenTime, HDLScore, ViewFSM- Managed 3 other power products: PrimePower-RTL, SpyGlass-PE, & PowerArtist- Helped AI, CPU, GPU, Mobile customers achive significant power savings- Deep insight into power flows and challenges from broad spectrum of semi companiesAwards & Recognitions -- 2023 25% power savings in Mobile chip- 2022 15W power savings in Server chip- 2021 2.5x boost in FPS in AI chip- 2017 Cadence DSG Superstar- 2012 Ansys, PowerArtist fastest growth- 2003 Zenasis Top 50 fastest growing- 1998 Summit, HDLScore fastest growth- 1994 Viewlogic, Engineering Excellence- 1991 Best Paper, VHDL User’s Group Conf- 4 Patents, 20+ Journal & Tech Publications
Listed skills include Semiconductors, Eda, Asic, Soc, and 37 others.
Jay Roy's current company
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Jay Roy work experience
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Group Director, Soc Power Continuum
Power is the next frontier for SOC designs. There is need for integration across Verification (activity generation), Implementation (block level typical activity for power optimization), and Signoff (small window ~1K cycles of SOC activity for peak power, IR drop, Thermal analysis). RTL Power estimation is the fulcrum that ties these areas of chip design.
Group Director, Rtl Power
Built Joules, a power calculator for RTL and Gates.
Senior Director, Rtl Power
RTL Power Analysis and Optimization
Consultant To The Office Of Cto
President
Sr. Manager, Design Technology Group
Vp Rtl Analysis & Optimization Tools
Vp Engineering
Principal Engineer
Jay Roy education
Doctor Of Philosophy - Phd, Computer Engineering
Bachelor Of Technology - Btech, Electronics And Communications Engineering
Frequently asked questions about Jay Roy
Quick answers generated from the profile data available on this page.
What company does Jay Roy work for?
Jay Roy works for Synopsys Inc.
What is Jay Roy's role at Synopsys Inc?
Jay Roy is listed as Chief Architect, Power Continuum at Synopsys Inc.
What is Jay Roy's email address?
AeroLeads has found 1 work email signal at @synopsys.com for Jay Roy at Synopsys Inc.
Where is Jay Roy based?
Jay Roy is based in San Jose, California, United States while working with Synopsys Inc.
What companies has Jay Roy worked for?
Jay Roy has worked for Synopsys Inc, Cadence Design Systems, Ansys Apache, Zenasis Technologies, and Sun Microsystems.
How can I contact Jay Roy?
You can use AeroLeads to view verified contact signals for Jay Roy at Synopsys Inc, including work email, phone, and LinkedIn data when available.
What schools did Jay Roy attend?
Jay Roy holds Doctor Of Philosophy - Phd, Computer Engineering from University Of Cincinnati.
What skills is Jay Roy known for?
Jay Roy is listed with skills including Semiconductors, Eda, Asic, Soc, Ic, Verilog, Vlsi, and Embedded Systems.
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