Co-Founder And Cto
Ulink Labs
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Jayant Charthad Email & Phone Number
Co-Founder and CTO
at
uLink Labs
LinkedIn matched
✓ Verified August 2026
3 data sources
Profile completeness 100%
Current company
uLink Labs
Role
Co-Founder and CTO
Location
San Francisco Bay Area, United States
Who is Jayant Charthad? Overview
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Quick answer
Jayant Charthad is listed as Co-Founder and CTO at uLink Labs, based in San Francisco Bay Area, United States. AeroLeads shows a matched LinkedIn profile for Jayant Charthad.
Jayant Charthad previously worked as PhD Candidate at Stanford University and Instructor (Fall 2017) at Stanford University. Jayant Charthad holds Doctor Of Philosophy (Phd), Electrical Engineering from Stanford University.
Profile bio
About Jayant Charthad
I aspire to develop innovative medical device technologies to solve the needs of patients, providers and payers.
Listed skills include Cadence Virtuoso, Rf Circuits, Power Management, Physics, and 5 others.
Current workplace
Jayant Charthad's current company
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Ulink Labs
7 roles · 16 years
Jayant Charthad work experience
A career timeline built from the work history available for this profile.
Phd Candidate
• Led collaborative system-level projects on wireless power transfer and implantable medical devices for peripheral nerve stimulation and on-demand drug delivery• Experience in different aspects of implantable device development including ultrasonic transducers, integrated circuits, electrode design, bio-compatible packaging and animal experiments
Sep 2012 - Dec 2018
Instructor (Fall 2017)
Stanford University
EE114/214A: Fundamentals of Analog Integrated Circuit Design• Taught a class of 47 graduate/undergraduate students, delivering lectures twice a week • Managed a team of 3 teaching assistants
Sep 2017 - Dec 2017
Teaching Assistant
EE214A: Fundamentals of Analog Integrated Circuit DesignEE214B: Advanced Analog Integrated Circuit DesignEE101B: Circuits IIPhysics 64: Electricity and Magnetism LabPhysics 105: Analog Electronics Lab
2011 - 2014
~3 yrs
Design Engineering Intern
SAR ADC Team• Designed a buffer amplifier for a high linearity, low noise ADC• Devised techniques for 10x reduction in the shutdown current of an existing ADC design
Jun 2012 - Aug 2012
Design Engineer
Power Management Team• Designed low-dropout regulator ICs (TLV702, TLV717) achieving fully functional first-pass silicon
Jul 2009 - Jul 2011
Intern
• Worked on functional verification of Tensilica's Xtensa processor ports using SystemVerilog
May 2008 - Jul 2008
3 education records
Jayant Charthad education
Doctor Of Philosophy (Phd), Electrical Engineering
Master Of Science (Ms), Electrical Engineering
Bachelor Of Technology, Electrical Engineering
FAQ
Frequently asked questions about Jayant Charthad
Quick answers generated from the profile data available on this page.
What company does Jayant Charthad work for?
Jayant Charthad works for uLink Labs.
What is Jayant Charthad's role at uLink Labs?
Jayant Charthad is listed as Co-Founder and CTO at uLink Labs.
Where is Jayant Charthad based?
Jayant Charthad is based in San Francisco Bay Area, United States while working with uLink Labs.
What companies has Jayant Charthad worked for?
Jayant Charthad has worked for Ulink Labs, Stanford University, Linear Technology, Texas Instruments, and Tensilica.
How can I contact Jayant Charthad?
You can use AeroLeads to view verified contact signals for Jayant Charthad at uLink Labs, including work email, phone, and LinkedIn data when available.
What schools did Jayant Charthad attend?
Jayant Charthad holds Doctor Of Philosophy (Phd), Electrical Engineering from Stanford University.
What skills is Jayant Charthad known for?
Jayant Charthad is listed with skills including Cadence Virtuoso, Rf Circuits, Power Management, Physics, Analog Circuit Design, Mixed Signal Ic Design, Integrated Circuit Design, and Matlab.
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