En charge de la partie Informatique et Technique chez AJMONETIC.

XILINX UltraScale + FPGA Based Board DevelopmentFirmware Development on a USB 2.0 USB Bridge (Cypress)Application Development in C#Prototyping on new FPGA board based on Altera Stratix 3 for our :- 32 bits secure micro-controllers (ST32, ST33 based on ARM CortexM3 & CortexM0)- 8 bits secure micro-controllers (ST21, ST23)- Integration of all the peripherals and all the communication interface : ISO 7813 / ISO14443 / SWP / I2C / SPI / USB / UART / etc ...Objectives of performance and reliability : our FPGA platform is used by all of our customers Adaptation of the ASIC constraints to FPGA contraints like Gated Clock, Clock Muxes, Latches, Memories, etc...Make Debug fonctionnality to help customer developing its code and respect specificity of the datasheet (by generating error or warning message for instance)Unitary tests to validate the emulator models (C routine, in assembly, ...)Debug Hardware / Software issue to report to design software team (beforeTape Out)Debug Customer / Internal issue on board (Code analysis, AMBA Bus Protocol analysis)Debug code using 128 channels HP/Agilent Logic AnalyzerVHDL Simulation using Modelsim (main debug is done using Logic Analyzer).Customer support either by phone, or in situ.Clearcase, Turtoise

In charge of the FAR (Field Application Reject) for automotive ST6/ST7/ST9 micro-controllers.In situ Customer visit to try to Understand the Default (either inside application or onto lab). Goal is to enhance our test coverage and avoid same default.Usage of all the ST7 debug capability to find the issue of the part (in assembly, C, using ICD in circuit debug feature).Worldwide Customer support

FPGA prototyping onto XILINX XC4000 Development of a new FPGA Board using 3 Virtex2 and a spartan2 to support our new 8 bits secure micro-controllers.Prototyping of all our 8 bits products onto this platform

Development of an API windows to control Smartcard Reader either asynchronous (ISO7816-3), or synchronous (I2C , ...).Documentation for EMV compliance (Electric tests and feature)

Modelisation in VHDL-AMS of the SAO libraries component used in aircraft documentation (RAFALE)Goal is to be able to simulate directly the specifications.Presentation done in Aerospatiale - Toulouse.