Jeannette Jacques, Phd
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Jeannette Jacques, Phd Email & Phone Number

SBU Mission Assurance and Product Safety (MAPS) Lead for Advanced Products and Solutions (APS) at Raytheon Technologies
Location: Dallas, Texas, United States 16 work roles 3 schools
1 work email found @rtx.com LinkedIn matched
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SBU Mission Assurance and Product Safety (MAPS) Lead for Advanced Products and Solutions (APS)
Location
Dallas, Texas, United States

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Jeannette Jacques, Phd is listed as SBU Mission Assurance and Product Safety (MAPS) Lead for Advanced Products and Solutions (APS) at Raytheon Technologies, based in Dallas, Texas, United States. AeroLeads shows a work email signal at rtx.com and a matched LinkedIn profile for Jeannette Jacques, Phd.

Jeannette Jacques, Phd previously worked as Associate Director of Mission Assurance at Raytheon Technologies and Program Quality Engineering Lead / Mission Assurance Lead at Raytheon Technologies. Jeannette Jacques, Phd holds Ph.D., Materials Science & Engineering from University Of Florida.

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About Jeannette Jacques, Phd

Senior Engineer and Materials Scientist with more than 20 years of experience working in lean manufacturing and research and development environments. Possess supervisory and project management experience, strong interpersonal and communication skills, and excel in cross-disciplinary teams that include design, process, test, logistics, quality, and automation personnel. Leader in sustaining activities, process integration methodologies, cycle time and cost reduction projects, and continuous improvement tasks that are both quality and reliability centered. Knowledge of advanced optics, uncooled bolometer, cooled focal plane array, and advanced semiconductor development and processing. Acknowledged as an expert in documentation control, statistical process control, and data management systems. Maintain a proactive approach to areas of responsibility and a proven track record for successful project completion. Engineering professional with a diverse background, unique skill set, and strong foundation for a range of manufacturing applications.

Listed skills include Failure Analysis, Design Of Experiments, Thin Films, Spc, and 46 others.

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Raytheon Technologies
Raytheon Technologies
SBU Mission Assurance and Product Safety (MAPS) Lead for Advanced Products and Solutions (APS)
Dallas, TX, US
AeroLeads page
16 roles

Jeannette Jacques, Phd work experience

A career timeline built from the work history available for this profile.

Sbu Mission Assurance And Product Safety (Maps) Lead For Advanced Products And Solutions (Aps)

Dallas, TX, US

Program Quality Engineering Lead / Mission Assurance Lead

Dallas/Fort Worth Area

Nov 2019 - Aug 2022

Principal Process Engineer With Honors

Dallas/Fort Worth Area

  • Provided Materials Science support across multiple Raytheon MAKE factories for RCCA, process development, and process optimization efforts. Thin Film technical liaison with ELCAN for various programs and Joint Capital.
  • Served on the Thin Film team, supporting optical interference coatings for use on a range of substrate materials. Coordinate and communicate the Thin Film area road map and capital plan, providing routine area updates.
  • EO Innovations Chief Engineer for the fabrication of Stinger® optics, leading a dynamic team of cross-functional engineers and coordinating supplier interactions to complete continuous improvement and streamlining.
  • Project facilitator and technical advisor for design, fabrication, and implementation of a novel deposition system for the fabrication of DAR (Durable Anti-Reflective) coated large area windows. Coordinated vendor and.
  • Principal Materials Engineer for multiple Internal Research & Development (IRAD) and process improvement efforts, including MeRLOT® alloy characterization and coating development, Enhanced Silver Based AR coatings, and.
  • Coordinated and managed coating source materials, including traceability, documentation, and vendor selection.
Apr 2018 - Nov 2019

Process Engineering Manager

Dallas/Fort Worth Area

  • Direct a dynamic team of 12 engineers and technicians responsible for bolometer fabrication, wafer level packaging, saw, flex attach, test, and solar stability across a range of integrated commercial and military.
  • Employ sound project management skills that effectively balance technical requirements, schedule performance, and resource availability. Drive a multi-disciplinary team and customer stakeholders to achieve milestones.
  • Serve as a member of Leadership Team for strategic planning, on Review Committee for new bids and proposals, and on Critical Review Board (CRB) for new process implementations.
  • Actively define and manage engineering forecast, including budget, consumables, failure analysis, and lot starts.
  • Coordinate monthly project reviews, including resource, schedule, and budget reporting to senior management.
  • Collaborate with design, integration, manufacturing, and customer representatives to determine and implement process changes to support improved manufacturability, yield, device performance, and reliability.
Oct 2017 - Apr 2018

Yield Enhancement / Process And Integration Engineer

Dallas/Fort Worth Area

  • Analyze product performance at all stages of development, manufacturing, and customer integration to establish projects to improve the yield of an advanced micro-bolometer infrared detector manufacturing business.
  • Serve as the first line of defense for recognizing, identifying, and raising awareness to new and critical process issues and yield excursions, communicating the risk assessment to logistics and supply chain, as well.
  • Collaborate with Business Development to assess manufacturing capabilities, translate customer requirements into product specifications, and propose new specifications to balance cost, schedule, and production line.
  • Apply sound statistical analysis and effective root cause analysis to address yield issues by utilizing data collection, analysis, and visualization tools, as well as failure analysis techniques, to define, monitor.
  • Build sustainable yield improvement methodologies and systems by leading the team responsible for in-house data visualization and statistical software development and deploying automated yield reporting, wafer map.
  • Completed a deep dive cluster analysis to determine the dominant failure mode across all products that lead to the implementation of a modified pixel design and resulted in a reduction of cluster failures, improving.
Mar 2015 - Apr 2018

Plasma Process Engineer

Dallas/Fort Worth Area

  • Secret Level Security Clearance (Current Investigation): Clearance Investigation Date of 03/18/2008; Clearance Eligibility Date of 03/28/2008
  • Oversaw a range of plasma etch and ash processes and equipment used in the fabrication of uncooled-Infrared (IR) VOx (Vanadium Oxide) bolometers and cooled-IR MCT (Mercury-Cadmium-Telluride) based focal plane arrays.
  • Executed the removal of metals, inorganic metallic compounds, oxides, and organic films for wafer and die level processing to satisfy the requirements of a range of product lines with a diverse materials base.
  • Coordinated cost and cycle time reduction, lean manufacturing, and process and product development activities.
  • Designed and executed experiments for process development, optimization, and new integration strategies.
  • Completed physical and failure analysis in support of root cause determination for a range of performance, yield, and defect related issues. Lead cross-functional teams in resolution of yield excursions.
Jan 2013 - Nov 2014

Ir Materials Process/Product Engineer

Dallas/Fort Worth Area

  • Contributed to fabrication and delivery of MCT used in the generation of diversified cooled-IR FPA devices.
  • Performed inspections, defect analysis, process optimization, and integration activities across MCT and CZT (Cadmium-Zinc-Telluride) based products to satisfy facility delivery, yield, cycle time, and cost metrics.
  • Oversaw thin film deposition and metrology processes and equipment: Parylene, Cadmium Telluride (CdTe), and Zinc Sulfide (ZnS) Depositions; Fourier Transform IR Spectroscopy (FTIR) systems (Automated and Manual).
  • Directed successful migration of Materials Manufacturing Factory from paper travelers to an electronic MES.
  • Served as Administrator for SPC charts for process equipment, material inspections, and product performance.
  • Represented Critical Change Board (CCB) reviewing both manufacturing and development documentation across multiple factories for Quality Assurance. Lead the transition team aligning supporting process documentation and.
Nov 2010 - Dec 2012

Operations Manager, Focal Plane Array Development (Fpad)

Dallas/Fort Worth Area

  • Directed MCT material work in progress (WIP) management and daily priorities to achieve cost, cycle time, and product delivery goals for the factory. Reported metrics on manpower, budgetary, resource, and inventory.
  • Supported Program Management and Business Development throughout the product life cycle, including bid and proposal generation, product development, transition to production, and sustaining efforts.
  • Supervised 20 process technicians, including FPA specialists, machine operators, and process specialists.
  • Coordinated safety initiatives, facility and manufacturing tours, and 5S Lean Manufacturing Activities.
  • Retained Research and Development Product Engineer role in addition to operational duties.
Nov 2009 - Nov 2010

R&D Product Engineer For Cooled Ir Devices

Dallas/Fort Worth Area

  • Developed novel mono-color and 2-Color MCT based FPA devices for Cooled IR applications.
  • Oversaw long-wave IR (LWIR) and mid-wave IR (MWIR) small pitch mono products and 2-Color MWIR-MWIR product lines across a range of read out integrated circuit (ROIC) and pitch platforms.
  • Supported the successful transfer of the 2-Color MWIR-MWIR product line into wafer level production.
  • Author and presenter at the 2009 Military Sensing Symposia (MSS) on 20um pitch sMW/MW FPAs.
  • Performed process development, process integration, and manufacturability activities. Assisted cross-functional teams with layout, design, testing, and FPA mount in support of a streamlined product development approach.
  • Identified areas requiring process optimization; developed and implemented process and metrology updates to support device yield, performance, and reliability in conjunction with a universal device fabrication.
Jul 2007 - Nov 2010

R&D Plasma Etch Process Engineer

Dallas/Fort Worth Area

  • Engineer within the Silicon Technology Development (SiTD) group.
  • Developed advanced 45 nm BEOL (Back End of Line) plasma etch processes (Via, Trench, Aluminum Cap, and Protective Overcoat).
  • Experience releasing tools for manufacturing and establishing tool qualification methodologies.
  • Lead the TopLeads Loop Team responsible for 45 nm BEOL metallization processes.
  • Generated, reviewed, and maintained manufacturing specifications and SPC charts.
  • Investigated Single-Layer (SLR) and Tri-Layer Resist (TLR) integrations for Immersion lithography to improve cost, manufacturability, resist poisoning, yield, and reliability.
Jan 2006 - Jun 2007

Intern: R&D Process Engineer In Thin Films Module

Dallas/Fort Worth Area

  • Assisted in development of mechanical reliability specification for low-k dielectric materials, based on underlying topography or dielectric stack effects and mechanical fracture strength.
  • Characterized mechanical stability of organosilicate glass (OSG) materials as a function of electron beam (e-beam) and ultra-violet (UV) cure treatments, including exposure to a range of environmental conditions and.
  • Supported selection of processing equipment.
  • Co-Inventor on Two Innovation Disclosures: (1) Method to Improve Dual Damascene (DD) Trench Etch Uniformity through Selective Dielectric Curing and (2) Method to Increase Mechanical Fracture Robustness of Porous low-k.
  • Co-Inventor on Two US Patents: Patent # 7342315 and Patent # 7341941
Jun 2004 - Nov 2004

Intern: Process Integration Engineer

Sunnyvale, CA

  • Supported gate and transistor teams within SOI (Silicon on Insulator) product development.
  • Drove a Defect Monitoring project for a new reticle set, analyzing and reporting on project developments.
  • Designed experiments, conducted electrical and physical analysis, characterized process limitations, and defined Critical Dimension (CD) and Electrical measurement programs.
  • Collaborated with Foundry counterparts as part of AMD’s alliance with United Microelectronics Corp. (UMC).
  • 2002 Intern of the Year Award Recipient for the Sunnyvale, CA Site
May 2002 - Aug 2002

Intern: Product Engineer In Process Integration

Dallas/Fort Worth Area

  • Member of the Copper Interconnect (CI) Loop Team. Coordinated Failure Analysis.
  • Developed capping system for in-line wafers scrapped for failure analysis, maintained web pages, and used SWAN Software to review integrated circuit layouts.
May 2001 - Aug 2001

Intern: Product Engineer In Wireless Division

Dallas/Fort Worth Area

  • Coordinated failure analysis for zero-yielding (scrap) wireless device wafers.
  • Researched, analyzed, and assigned scrap wafers to appropriate engineering modules.
  • Maintained Wireless Zero-Yield Database, calculating and reporting appropriate statistics.
May 2000 - Aug 2000

Intern: Process Engineer In Yield Enhancement

Dallas/Fort Worth Area

  • Involved with in-line defect analysis and problem solving, focusing on the identification of defect signatures, compositions, and sources.
  • Worked in defect sub-teams to develop measures to minimize future excursions.
May 1999 - Dec 1999
3 education records

Jeannette Jacques, Phd education

Ph.D., Materials Science & Engineering

Activities and Societies: Materials Research Society (MRS) • Specialization in Electronic Materials • Graduate GPA 4.00/4.00 •.

M.S., Materials Science & Engineering

Activities and Societies: Materials Research Society (MRS) • Specialization in Electronic Materials • Graduate GPA 4.00/4.00 • National.

B.S., Materials Science & Engineering

Activities and Societies: Materials Research Society, Society of Women Engineers, Society of Plastics Engineers • Specialization in.

FAQ

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What company does Jeannette Jacques, Phd work for?

Jeannette Jacques, Phd works for Raytheon Technologies.

What is Jeannette Jacques, Phd's role at Raytheon Technologies?

Jeannette Jacques, Phd is listed as SBU Mission Assurance and Product Safety (MAPS) Lead for Advanced Products and Solutions (APS) at Raytheon Technologies.

What is Jeannette Jacques, Phd's email address?

AeroLeads has found 1 work email signal at @rtx.com for Jeannette Jacques, Phd at Raytheon Technologies.

Where is Jeannette Jacques, Phd based?

Jeannette Jacques, Phd is based in Dallas, Texas, United States while working with Raytheon Technologies.

What companies has Jeannette Jacques, Phd worked for?

Jeannette Jacques, Phd has worked for Raytheon Technologies, L3 Technologies, L-3 Communications, Drs Technologies: Sensors & Targeting Systems, Infrared Division, and Texas Instruments, Inc..

How can I contact Jeannette Jacques, Phd?

You can use AeroLeads to view verified contact signals for Jeannette Jacques, Phd at Raytheon Technologies, including work email, phone, and LinkedIn data when available.

What schools did Jeannette Jacques, Phd attend?

Jeannette Jacques, Phd holds Ph.D., Materials Science & Engineering from University Of Florida.

What skills is Jeannette Jacques, Phd known for?

Jeannette Jacques, Phd is listed with skills including Failure Analysis, Design Of Experiments, Thin Films, Spc, Semiconductors, Characterization, Metrology, and Process Engineering.

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