Jeegar Shah Email & Phone Number

California, United States

Sunnyvale, California, United States

Lead next generation tooling for Large Language Models (LLM) from model training to evaluation and finally release pipelines to put these models in production for AGI use cases including Alexa AI.Also lead Systems Development team for addressing developer needs thus reducing operational load while building centralized areas of operational expertise.

San Francisco Bay Area

Smart Business Intelligence report cataloging/indexing to perform hypothesis testing, root-cause analysis, and trend spotting through use of reinforcement techniques and personalization to prioritize cross-report insights that match executive and SME business decision-making needs.

Falkonry is a pattern recognition technology for the scalable discovery and recognition of operating conditions from operational time series data. Falkonry Service is integrated with operations management solutions to improve the efficiency, quality, and reliability of IT and industrial operations. This is enabling production operations globally to improve.

Silicon Valley

Strategy Consulting for Fortune 500 executives on AI, Semiconductors, IoT and High Tech. Focused on product strategy and roadmap, M&A, GTM and new blue sky opportunities. As Engagement Manager led teams of associates, business analysts and industry experts for solving and identifying new business opportunities.

• Cloud-based SaaS business that allows life science researchers to manage, collaborate & run analytics on animal management services and experiments.It also provides revolutionary and proprietary breeding algorithms to.
• MouseHouse is a funded startup that has won several business competitions including the Rice Business Competition 2013, New Venture Challenge (NVC) 2012 at Chicago Booth, QEC 2012 (Canada), Chicago Techweek 2012 and.
• Was featured in CNN, Fortune Magazine (May 2013), CNBC, Chicago Tribune for promising business ideas and entrepreneurship
• Architected & developed the laboratory product and built out the back-end using Ruby-On-Rails
• Designed and formulated the API to help interact with an iPad app and a web-based java applet
• Managed product development efforts across 3 international teams

Sunnyvale, CA

• Full Chip Timing Lead - x86 Core Microprocessor Team
• Led a team of senior Design team Leads as the Full-chip Timing/ Performance Lead
• Structured complex design roadmaps for upper management
• Provided design guidance to an international team of engineers
• Responsible for providing timing flows/ methodologies / timing simulation and chip integration tasks.
• Designed interfaces/ databases to analyze and present timing convergence data across multiple design units and the full chip to better evaluate and estimate timing convergence and project roadmaps

Sunnyvale, CA

• Circuit designer (stdcell and macros) for Core microprocessor (Bulldozer) team
• Analyzed and investigated circuit topologies to devise unique and power-optimal circuits for high-performance server designs
• Review architectural feasibility for next generation processor designs by running performance simulations and brainstorming architectural improvements
• Worked on various units of AMDs x86 microprocessor: - Load Store - Branch Prediction - Decoder

Sunnyvale, CA

• Construction and Design Optimization CAD - microprocessor team.
• Authored critical performance-power optimization CAD (Computer Aided Design) software that replaced existing algorithms from a third-party CAD company resulting in direct licensing costs savings
• Authored statistical tools and designed an optimization engine based on convex optimization for simultaneous transistor swapping, resizing and pin swapping to achieve power reductions while constrained within the same.
• Developed design construction tools for ASIC stdcell Placement/ Routing, DFT, functional verification, design infrastructure, transistor sizing/swapping, repeater insertion and other optimization tools.
• Developed a design database using Ruby-On-Rails and SQL to retrieve valuable design data and evaluate chip design progress/ convergence based on certain design metrics.

Master Of Business Administration (Mba)

Hcp - Professional Learning, Electrical And Computer Engg

Focused on Computer Architecture, Optimization, Linear Dynamic systems, Advanced Circuit design techniques, Algorithms, Graph Theory.

Ms, Electrical And Computer Engg

• GPA – 3.95/4.0; awarded Graduate Fellowship for academic achievements and research contributions • Led 5 graduate students to initiate.

B-Tech, Engineering Physics