Bringing the best technology and complex IP to Automotive microchips.

Focused on Power-Performance-Area-Cost-Time Equation while leading cross functional teams and external partners to build and deploy Applications Processors for Consumer, Industrial and Automotive markets.

Bringing next generation i.MX Applications Processors from concept to launch.

Technical and Business focal point for External Memory Partnerships within NXP Consumer-Industrial and Grade 2/3 Automotive Microcontrollers (Kinetis) and Applications Processors (i.MX).

Fully Depleted Silicon On Insulator (FD-SOI) Planning: Manage comprehensive plans for advanced technology and methods.Program Execution: Lead Cross functional internal and external teams to amazing products.Opportunity and Risk Management: Quickly identify issues and mitigate them while driving toward goal.Organizational Engagement: Work at all levels of organization understanding issues relating to: budget, contracts, labor, technology, methods and quickly resolving them.

Planning: Manage comprehensive plans for advanced technology and methods.Program Execution: Lead Cross functional internal and external teams to amazing products.Opportunity and Risk Management: Quickly identify issues and mitigate them while driving toward goal.Organizational Engagement: Work at all levels of organization understanding issues relating to: budget, contracts, labor, technology, methods and quickly resolving them.

Design IP supporting Non-Volatile Memories, providing chip-top support for yield enhancement and production issues, active participant in reverse engineering analysis and competitive analysis reporting as it relates to embedded memory. Additional functions include being a member of the Freescale Patent Committee and a Semiconductor Research Council (SRC) Industry Liaison.

ANALOG CIRCUIT DESIGNER | AUSTIN, TX 2005-CURRENTLed analog circuit design used in Non-Volatile Embedded Memories. Responsibilities include: managing layout personal, specifying/designing/simulating and testing various circuit topologies while maintaining power/size/performance tradeoffs. Specific circuit exposure has been in: Bandgaps, Oscillators, Regulators, Current References, Low/High Voltage Charge Pumps, High Voltage Switching networks, Array Design, I/O & ESD pad circuits. Interests have also included advanced test methodologies, auto calibration, sample and hold circuits and a renewed interest in Switch Capacitor topologies.

ANALOG/DIGITAL CIRCUIT DESIGNER | AUSTIN, TX 2001-2005Modified/Verified/Synthesized existing RTL design interfaces to non-volatile memories in order to reduce size by switching from dedicated registers to a general register format and aid in parameterization for switching to different module sizes. Worked with the Failure Analysis group to design-experiments, debug and design update several sub-modules in the flash memory using: micro probing, thermal image analysis, scanning electron microscopes, atomic force probing and various parametric analyzers.

SEMICONDUCTOR SOFTWARE DEVELOPER | LOWELL, MAInternship responsibilities were to code internal workings of a proprietary Smith Chart tool used in RFIC design.

CREW CHIEF | UNITED STATES AIR FORCE | ARIZONA & UNITED KINGDOMResponsible for all facets of maintaining F-15E tactical fighter aircraft. Specifically: fault isolation, mechanics (structural, hydraulic, pneumatic, electrical, powerplant) and various avionics systems.