Jeffrey Kung Email & Phone Number
@cisco.com
LinkedIn matched
Who is Jeffrey Kung? Overview
A concise factual answer block for searchers comparing this professional profile.
Jeffrey Kung is listed as Solutions Architect at Astera Labs, based in Cupertino, California, United States. AeroLeads shows a work email signal at cisco.com and a matched LinkedIn profile for Jeffrey Kung.
Jeffrey Kung previously worked as Hardware Engineer at Marvell Technology and Hardware Engineer at Innovium Inc.. Jeffrey Kung holds Bachelor Of Science (B.S.), Electrical Engineering from University Of California, Davis.
Email format at Astera Labs
This section adds company-level context without repeating Jeffrey Kung's masked contact details.
AeroLeads found 1 current-domain work email signal for Jeffrey Kung. Compare company email patterns before reaching out.
About Jeffrey Kung
Jeffrey Kung is a Solutions Architect at Astera Labs. He possess expertise in c, matlab, c++, microsoft excel, microsoft office and 12 more skills.
Listed skills include C, Matlab, C++, Microsoft Excel, and 13 others.
Jeffrey Kung's current company
Company context helps verify the profile and gives searchers a useful next step.
Jeffrey Kung work experience
A career timeline built from the work history available for this profile.
Hardware Engineer
Hardware Engineer
Hardware Engineer
Performed schematic capture with hierarchical design tools●Designed modular line card for network switches●Provided support for PCB layout●Oversaw prototype build●Performed hardware bring-up, debugging and qualification●Conducted initial environmental tests to validate electrical design●Generated bill of materials (BOM)●Drafted and maintained technical documentation describing hardware architectureCollaborated with various teams including SI, software, mechanical, manufacturing, and marketing●Provided root cause analysis for critical design issues●Assisted with compliance testingWorked with contract manufacturer to maximize yield●Debugged boards remotely●Visited site to improve processValidated compatibility of new components with existing hardwareProvided support to failure analysis team, resolving issues found in the fieldControlled distribution of prototypes to various teams
Signal Integrity Intern
Signal and power noise analysis and measurement (SI/PI)●Performed eye and jitter measurements at compliance checkpoints against industry standards for high speed SerDes and PCIe Gen2 interfaces●Measured PI parameters, such as switching AC noise and DC droop●Measured differential and single ended clocks●Worked with Diagnostic engineer on front port SerDes transmitter tuning with Host Compliance Board (HCB)100G QSFP copper cable assembly characterization and connector analysis●Skew measurement with TDR (Time Domain Reflectometry)●S-parameter measurement with 16 port VNA (Vector Network Analysis)●Near end, far end crosstalk measurementAutomated SI/PI report process with Python scriptsUsed Cadence Allegro tools to view board files to identify nets of interest and probe points●Soldered sensitive high speed probes to board for optimal measurementsTrained other employees to perform SI/PI measurement tasks
Hardware Intern
Validated behavior of fan speed control algorithm●Looked at on die temperature reading of chip and compared various fan speeds●Determined optimal fan speeds for low power consumption while satisfying system thermal requirements●Characterized system acoustic signature, preventing undesired effects such as beating and fan stall●Modified fan tray for fault injection; this simulates single and multiple fan failure scenariosTested and verified DC power supply module●Provided hardware support to software team to debug interrupt storm issues●Validated power supply redundancy (N+N and N+1 models) and shutdown features of modular chassis●Set up test fixture for environmental tests (EDVT)Constructed rework procedure for contracted manufactured staff to efficiently perform clock domain rework on site●Guided rework contractors to go through 300+ boards and tested each board before re-distribution to development team
Intern
Reverse engineered a electrical smartmeter●Disassembled a commercial smartmeter, researched components used in device●Drew schematic showing how each component is connectedPerformed feasibility study on viability of smartmeters
Jeffrey Kung education
-
University Of California, Davis
Frequently asked questions about Jeffrey Kung
Quick answers generated from the profile data available on this page.
What company does Jeffrey Kung work for?
Jeffrey Kung works for Astera Labs.
What is Jeffrey Kung's role at Astera Labs?
Jeffrey Kung is listed as Solutions Architect at Astera Labs.
What is Jeffrey Kung's email address?
AeroLeads has found 1 work email signal at @cisco.com for Jeffrey Kung at Astera Labs.
Where is Jeffrey Kung based?
Jeffrey Kung is based in Cupertino, California, United States while working with Astera Labs.
What companies has Jeffrey Kung worked for?
Jeffrey Kung has worked for Astera Labs, Marvell Technology, Innovium Inc., Cisco, and Insieme Networks.
How can I contact Jeffrey Kung?
You can use AeroLeads to view verified contact signals for Jeffrey Kung at Astera Labs, including work email, phone, and LinkedIn data when available.
What schools did Jeffrey Kung attend?
Jeffrey Kung holds Bachelor Of Science (B.S.), Electrical Engineering from University Of California, Davis.
What skills is Jeffrey Kung known for?
Jeffrey Kung is listed with skills including C, Matlab, C++, Microsoft Excel, Microsoft Office, Hardware, Verilog, and Embedded Systems.
Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.
Start free trial