• Led teams of five to seven engineers in the baseband design of three Nokia Windows Phone products utilizing Qualcomm chipsets MSM8655, MSM8960, and MSM8974.• Responsible for all aspects of the baseband design beginning with the initial concept stage through in-market support, including schematics, PCB layout, reviews, build support, testing, and production ramp-up.• Responsible for resource planning, scheduling, prototype planning, test planning, and creating the in-market troubleshooting guide for the service centers.

• Supervised, provided consultation, and reviewed baseband designs of Nokia’s CDMA ODM partners utilizing Qualcomm chipsets for multiple phone programs to help meet program milestones and ensure successful program execution.• Major tasks included participating in collaborative ID design meetings, weekly program meetings, milestone review meetings, and travel to Asia to visit ODM partners.

• Led team of 15 baseband engineers in the development of CDMA and GSM/WCDMA phone programs that incorporated GPS, Bluetooth, FM radio, camera and flash, USB, SIM card, microSD, dual LCD displays, flip detect, etc.• Created baseband project plans, drove baseband milestone reviews, and served as the main program interface to core baseband engineers.• Created baseband schematics, supervised PCB layout, and held baseband schematic and layout reviews.• Supported factory builds, planned and coordinated baseband testing, and held baseband test result reviews.

• Responsible for the CDMA baseband digital ASICs for Nokia CDMA phone programs.• Created schematics, supervised layout designs, and analyzed ATE test results for the CDMA digital ASICs for all CDMA phone programs, including memory interfaces.• Created qualification test plans for all new versions of CDMA digital ASICs and coordinated testing with phone programs, sourcing, software, and test groups to ensure timely and smooth transitions.• Maintained the ASIC roadmap to help CDMA programs identify the appropriate ASICs and versions to use in phone programs.

• Managed a team of eight software and hardware engineers in the design of a Modular HDTV prototype to be demonstrated at the Consumer Electronics Show (CES). The prototype featured an ATSC tuner, DVD and SmartMedia player and used the IEEE-1394 bus and the TeraLogic TL850 MPEG chip.• Devised and secured management approval for a compensation plan designed to motivate engineers to work extra hours and on paid holidays in order to meet project schedule goals.• Completed successful demonstration on time and under budget resulting in high customer satisfaction.

• Led a team of six hardware engineers in the design and development of a set-top box for the cable industry that featured PVR, two-way cable modem, 802.11b wireless, and video conferencing capability.• Led a team of six hardware and mechanical engineers in the development of a subsystem for a high-speed digital camera application that included a gigabit Ethernet switch and high-G packaging.• Designed a professional set-top box for use in the head-end for the satellite TV industry utilizing the IBM PPC405GP Processor and the IBM MPEGCS24D MPEG Decoder.

• Designed and developed three consumer set-top boxes utilizing the IBM PPC403 Processor, VLSI VES2020/30 Transport Demultiplexor, the IBM CD21/CS22 MPEG Decoder and Xilinx FPGAs.• Designed and developed a consumer set-top box utilizing the LSI L64008 CPU/Transport and the LSI L64005 MPEG Decoder.• Designed, developed, maintained and supported customers of the Bitstream Capture/Generator product for DIRECTV set-top box development that generated millions of dollars of revenue for the company.

• Designed and developed the System Controller Board for the Model 200 Large Screen Video Projector. The board used the Advanced Micro Devices (AMD) Am29240 RISC Microcontroller and Altera MAX 7000 Series EPLDs written in the Altera Hardware Description Language (AHDL). The board also featured AMD's Am29F040 4Mbit Flash Memory, 16Mbit DRAM ICs, 2Mbit VRAM ICs, and a Brooktree Bt481 RAMDAC.• Designed the CCD Camera digital control circuitry and interface to the System Controller Board for the Model 200 Projector.• Designed the Model 200 Raster Timing Generator Board that utilized Altera FLEX 8000 Series FPGAs.• Designed the System Controller Board for the Model 300 Large Screen Video Projector that used the Motorola MC68302 Microprocessor and the Analog Devices ADSP-2105 Digital Signal Processor (DSP).• Performed board level test, software integration, system integration and test, and production support.