Sr. Manager Silicon Design Engineering
CurrentGPU SoC Design Verification, SoC Power Analysis and Optimization
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Ji Gu is listed as Sr. Manager Silicon Design Engineering at AMD at AMD, a company with 16705 employees, based in Shanghai, China, China. AeroLeads shows a work email signal at amd.com and a matched LinkedIn profile for Ji Gu.
Ji Gu previously worked as Sr. Manager Silicon Design Engineering at Amd and Manager Silicon Design Engineering at Amd. Ji Gu holds Doctor Of Philosophy (Ph.D.), Computer Science And Engineering from University Of New South Wales.
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AeroLeads found 1 current-domain work email signal for Ji Gu. Compare company email patterns before reaching out.
An engineer has great research and design experience in processor architecture, front-end digital circuit, and embedded system design, with particular exposure to low-power and high-performance design for embedded processors and memory subsystems. Also an experienced verification engineer of using SystemVerilog, Vera, and the associated frameworks (UVM, OVM and RVM) in block and system level verification of 802.11 WiFi (up to 11ac and 11ah).Specialties:CPU micro-architecture, RISC architecture (MIPS, ARM, PowerPC), CacheVerilog, VHDL, SystemVerilog, VERA, C/C++, PerlFront end RTL designASIC design and verificationFPGA prototypingHardware/Software co-designEmbedded programming
Listed skills include Embedded Systems, Asic, Verilog, Rtl Design, and 10 others.
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Shanghai, China
GPU SoC Design Verification, SoC Power Analysis and Optimization
Shanghai, China
GPU SoC Design Verification, SoC Power Analysis and Optimization
Perth, Australia
Development of verification environments using SystemVerilog, Vera, and the associated frameworks (UVM, OVM and RVM), mostly in block and system level verification of 802.11 (up to 11ac and 11ah) MAC's.
Kyoto, Japan
Worked on embedded processor architectures and OS-based power management techniques for environmental energy-based systems. Work is focused on the design of dynamic energy scalable multi-core architectures, low-energy multitasking processor design, on-chip resizable cache hierarchies design and non-volatile memory design techniques.
Sydney, Australia
Design of low-power embedded RISC processors, application-specific instruction set processors and other processor based ASIC systems. Work includes design of processor datapath, pipeline control, and memory hierarchy for power and performance optimization. The designs are implemented at RTL level and power/performance are evaluated based on post-synthesis.
Netherlands
Industrial trainee and research engineer works in cooperation with NXP for embedded systems design. Work includes mapping SiliconHive processor cores onto FPGA for prototyping, partitioning the program source code for core mapping, and design of the on-chip shared memory.
Shanghai
Development of billing subsystem for military clients for an independent and confidential bill processing. Work includes design of the modules for bill generation, bill clearance and data synchronization between the sub-billing system and the main billing system.
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Kalaiyarasan Meganathan
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Hyderabad, Telangana, India, India
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Callan Mcinally
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Shrewsbury, Massachusetts, United States, United States
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Sundar Rangarajan
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Austin, Texas, United States, United States
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Akhila Nakhate
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Santa Clara, California, United States, United States
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Daniel Bankman
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Cupertino, California, United States, United States
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Robert Hankinson
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Orlando, Florida, United States, United States
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Zhiying Liu
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Jinan, Shandong, China, China
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Namburi Satya Devi
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Hyderabad, Telangana, India, India
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Anita Green
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Warfield, England, United Kingdom, United Kingdom
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Afeez Adegboyega
Colleague at Amd
Edo State, Nigeria, Nigeria
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Processor architecture, Embedded systems, Memory subsystem, Low power, High performance, Hardware/Software co-design
VHDL/Verilog RTL design, FPGA, Multi-core platform design
Quick answers generated from the profile data available on this page.
Ji Gu works for AMD.
Ji Gu is listed as Sr. Manager Silicon Design Engineering at AMD at AMD.
AeroLeads has found 1 work email signal at @amd.com for Ji Gu at AMD.
Ji Gu is based in Shanghai, China, China while working with AMD.
Ji Gu has worked for Amd, Lateral Sands, Kyoto University, University Of New South Wales, and Eindhoven University Of Technology.
Ji Gu's colleagues at AMD include Kalaiyarasan Meganathan, Callan Mcinally, Sundar Rangarajan, Akhila Nakhate, and Daniel Bankman.
You can use AeroLeads to view verified contact signals for Ji Gu at AMD, including work email, phone, and LinkedIn data when available.
Ji Gu holds Doctor Of Philosophy (Ph.D.), Computer Science And Engineering from University Of New South Wales.
Ji Gu is listed with skills including Embedded Systems, Asic, Verilog, Rtl Design, Vhdl, Simulations, Fpga Prototyping, and Signal Processing.
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