Ji Gu Email & Phone Number

Shanghai, China

GPU SoC Design Verification, SoC Power Analysis and Optimization

Shanghai, China

GPU SoC Design Verification, SoC Power Analysis and Optimization

Shanghai, China

GPU SoC Design Verification

Shanghai, China

Ethernet, MAC/PHY, Certitude

Perth, Australia

Development of verification environments using SystemVerilog, Vera, and the associated frameworks (UVM, OVM and RVM), mostly in block and system level verification of 802.11 (up to 11ac and 11ah) MAC's.

Kyoto, Japan

Worked on embedded processor architectures and OS-based power management techniques for environmental energy-based systems. Work is focused on the design of dynamic energy scalable multi-core architectures, low-energy multitasking processor design, on-chip resizable cache hierarchies design and non-volatile memory design techniques.

Sydney, Australia

Design of low-power embedded RISC processors, application-specific instruction set processors and other processor based ASIC systems. Work includes design of processor datapath, pipeline control, and memory hierarchy for power and performance optimization. The designs are implemented at RTL level and power/performance are evaluated based on post-synthesis simulation.

Netherlands

Industrial trainee and research engineer works in cooperation with NXP for embedded systems design. Work includes mapping SiliconHive processor cores onto FPGA for prototyping, partitioning the program source code for core mapping, and design of the on-chip shared memory.

Shanghai

Development of billing subsystem for military clients for an independent and confidential bill processing. Work includes design of the modules for bill generation, bill clearance and data synchronization between the sub-billing system and the main billing system.

Doctor Of Philosophy (Ph.D.), Computer Science And Engineering

Processor architecture, Embedded systems, Memory subsystem, Low power, High performance, Hardware/Software co-design

Master Of Science (Msc), Computer Science

VHDL/Verilog RTL design, FPGA, Multi-core platform design

Bachelor Of Engineering (Beng), Computer Science