Jing Yu Email & Phone Number

Australia

• I focus on data management, statistical analyses and report writing of the new FPGA architecture development.Key responsibilities
• Responsible for planning and summarizing the data of proposed architecture.
• Report new findings in weekly meetings.
• Creates and monitors data management and statistical analyses.
• Maintenance our open-source CAD flow on GitHub.Key achievements
• Our FPGA chip succesfully tapeouts in Google's Open MPW Shuttle Program

Melbourne, Australia

• My research primarily focuses on “Asynchronous Programmable Logic for Reconfigurable Network on Chip Architectures”; it analyses the advantages of the asynchronous reconfigurable system against the commercial FPGA.
• Investigated a novel clock-less approach to build complex connection networks on computer chips and have demonstrated they operate with significantly less delay than conventional techniques.
• Modified Reconfigurable Systems CAD toolsets for synthesis and timing analysis on Stratix V devices.
• Built an asynchronous reconfigurable circuit layout with Cadence Virtuoso for the simulation purpose to compare with the synchronous FPGA devices.
• Published “A dual-rail LUT for reconfigurable logic using null convention logic”.
• Attended Great Lakes Symposium on VLSI (GLSVLSI) 2014 in Houston, Texas, USA.

City Campus, Melbourne

• I taught undergraduate students in Engineering Computing, Embedded System and Digital Design in RMIT University. Key responsibilities
• Teach C/C++ and Assembly languages in tutorials and labs.
• Supervise the students to finish labs and tutorial workshops to solve specific problems with programming languages.
• Liaise with lecturers and other tutors to ensure courses run smoothly.
• Weekly consultation with students as a head tutor.
• Collaborate with lecturers and other tutors to set up exams and resolve issues during the tutorials and labs.Key achievements

Zhuhai, Guangdong, China

• Collaborated with TechnoSolve (ZhuHai) Software Co Ltd to build a plug-in tool for bank system for database XML files exportation.Key achievements
• Utilised my JAVA programming and problem-solving skills to meet the requirements from the customers.
• Scored 80+ in final year project.
• Demonstrated ability to work collaboratively within team environment

• Mentored and taught skills to new colleagues
• Filled hundreds of books in a hour
• Satisfy every students or teachers need with good customer services
• Given warnings to the students who broke the rules of library
• Tip the new books skilfully nearly a thousand books a day

Doctor Of Philosophy (Ph.D.), Electrical And Electronics Engineering

Master Of Engineering - Meng, Electrical And Electronics Engineering

Bachelor'S Degree, Computer Science

Activities and Societies: Kyudo Club, Part-time Librarian, Orientation day Mentoring, High Table dinner