Jisoo Lee Email & Phone Number

Palo Alto, CA, US

San Jose, California, United States

• Led team of ML engineers to develop lean DNN model that serves SMT/BGA QC inspection on semiconductor post-processing production line which has extremely low fail rate (<0.01%) and data asymmetry.
• Developed DNN model that rates the quality of lithium-ion battery packaging in production line that works in conjunction with existing automated optical inspection system.
• Led transition of in-house ML train and serve framework to Ray Train/Tune for simpler code, operational overhead reduction, data parallel training.

San Jose, California, United States

• R&D and production design of manufacturing test solutions for Camera, Display, and Illumination (LED/VCSELs) Devices for a major VR/XR vendor with world leading R&D teams in optics, cameras, and sensors.

Greater San Diego Area

• Developed DNN solutions for Qualcomm's ML Image Signal Processing (ISP) team from initial concepts to hardware mapping on Snapdragon SoC ASIC.
• Developed Qualcomm proprietary camera noise and color models to enhance ML-ISP training to ensure that it can compete with and even exceed the most advanced and sophisticated image processing pipeline designs in the.
• Optimized DNN inference engine for video rendering for integration into Snapdragon SOC. This process entailed custom layer design for memory efficiency, weight/activation quatization, and close collaboration with.
• Designed phase detection auto focus statistics engine which allows PDAF to also create a dense 3D depth map in real-time.

• Assisted Laboratory Operation in Laser Alignment Setup in Laser Cooling and Trapping Group, Quantum Optics Group, including fabrication of custom parts that maintain vacuum conditions for precise and accurate data.
• Conducted literature reviews and data analysis, assisting in the development of research proposals and preparing research reports, discussing the latestadvances in the field of Quantum Optics.

• Camera module manufacturing test and calibration protocols with Apple QA engineers.
• Full-time studies in optical sciences and full-time supervisory position managing Asia.
• Lead rapid manufaturing issue identification and resolutions in East Asia factory operations as QA lead in high-paced, high-capacity production environment.

• Image processing algorithm design including Bayer denoise, multi-exposure HDR, global/local tone mapping, lens shading and lens distortion correction.
• HDR algorithms in blending and tone mapping for automotive and security applications.CMOS 4-T, 5-T, 6-T pixel development for mobile, automotive, security, defense applications 3D optical simulation of CMOS pixel.
• Lens shading and distortion correction, global and local tone mapping, nonlinear pixel processing, multiframe and interlaced HDR.

Image processing algorithm design including Bayer denoise, multi-exposure HDR, global/local tone mapping, lens shading and lens distortion correction.HDR algorithms in blending and tone mapping for automotive and security applications CMOS 4-T, 5-T, 6-T pixel design and dark current reduction by identification of defect types by activation energy evaluation

Master Of Science - Ms, Optical Sciences

• Completed course requirements for mater's degree with exception of 1 laboratory course work (Missed due to personal reasons)

Doctor Of Philosophy - Phd, Electrical Engineering, 3.9

Silicon Devices and Integrated Circuits Laboratory (SiDIC)

Bachelor Of Applied Science - Basc, Electrical And Computer Engineering

Ph.D. research in electron transport in CMOS based pixel structures Optical and electrical crosstalk characterization in pixel array