High throughput network design for LTE

Designed & Developed Platform Abstraction Layer for porting LTE eNB L2 Stack on TI C6670 Multicore DSP Platform.Roles & Responsibilities including -  TI C6670 EVM / AMC Board bring up & functional verificationo Developed prototype projects for initialization of C6670 Co-Processors & hardware accelerators including Multicore Navigator, Packet Accelerator, Queue Manager Subsystem.o Developed prototype projects to verify Multicore Navigator functionality for Memory region insertion, Queue management & Accumulator interrupt generation.o Developed prototype projects to verify Packet Accelerator functionality for network input / output flow. Message Queue Communication developmento Developed Inter / Intra core Message Queue Communication APIs using C6670 Interrupt Controller, Queue Manager Subsystem & Semaphores. Network I/O developmento Developed Network Ingress / Egress APIs using TI C6670 Packet Accelerator & Queue Manager Subsystem. Timer framework developmento Developed Timer services framework using SYS/BIOS Clock module. Cache Memoryo Enabled L1P, L1D & L2 Cache with Cache Coherence support using CSL Cache LLDs. Performance Analysis & Optimization o Performance Analysis of eNB Software by using UIA (Unified Instrumentation Architecture) to get statistics such as CPU Load, Task Load Execution Graph & Context aware profiling.o Optimized code for achieving higher throughput by using TI C6670 hardware accelerators to perform expensive memory copy operations.o Enabled Compiler Optimization options. LOG Framework development o Developed light weight LOG Framework using Queue Manager Subsystem to ensure minimal load on real time tasks.