Senior Hardware Design Engineer
CurrentArchitect, design and implement features for fpga based network test equipment. Team lead for architecture and design of network emulator product.
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@aukua.com
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Joel Davidson is listed as Senior Hardware Design Engineer at Aukua Systems, based in Austin, Texas, United States. AeroLeads shows a work email signal at aukua.com and a matched LinkedIn profile for Joel Davidson.
Joel Davidson previously worked as Design Consultant at Aukua Systems and RTL Design Engineering Consultant at Cavium. Joel Davidson holds Meng, Electrical Engineering from Cornell University.
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ASIC / SOC design professional with demonstrated success in digital system, subsystem and chip architecture and design. Experienced in rtl design, simulation and synthesis. Self motivated and innovative with excellent verbal and written communication skills.Specialties: Verilog, Perl, C, assembler. Synopsys design compiler, VCS simulation. Embedded hardware and software development.
Listed skills include Rtl Design, Verilog, Asic, Soc, and 31 others.
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Architect, design and implement features for fpga based network test equipment. Team lead for architecture and design of network emulator product.
Architect, design and implement features for fpga based network test equipment.
Developed rtl modules for cell communications baseband processor. Fixed bugs, developed testprograms for Xtensa LX10 processor.
Developed validation test programs for power management embedded processor on multicore POWER8 processor using PPC604 assembly language and C. Acted as interface between power management team and bringup lab team, scheduling system repairs and upgrades, and problem resolution.
Implemented fixed-point dsp algorithms in hardware for WLAN, video, and communications SOCs. Worked with architects to take algorithms in a C++ system simulator and develop verilog implementations that provided bit accurate results. Implemented mapper and demapper logic for a MOCA (Multimedia Over Coax) communications SOC. Improved accuracy of color management calculations and implemented color conversion algorithms (HSV-RGB) for a display controller SOC.
Sunnyvale, Ca, Us
Intellectual property development and testing. Member of design team for configurable DDR/DDR2/DDR3 memory controller. Design team lead for flash memory controller.
Armonk, New York, Ny, Us
Microarchitecture and design of digital logic. Performance monitor unit for Power4 processor; dataflow chip for Power3 processor based symmetric multiprocessor system.
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Joel Davidson works for Aukua Systems.
Joel Davidson is listed as Senior Hardware Design Engineer at Aukua Systems.
AeroLeads has found 1 work email signal at @aukua.com for Joel Davidson at Aukua Systems.
Joel Davidson is based in Austin, Texas, United States while working with Aukua Systems.
Joel Davidson has worked for Aukua Systems, Cavium, Ibm, Vixs Systems, and Denali Software.
You can use AeroLeads to view verified contact signals for Joel Davidson at Aukua Systems, including work email, phone, and LinkedIn data when available.
Joel Davidson holds Meng, Electrical Engineering from Cornell University.
Joel Davidson is listed with skills including Rtl Design, Verilog, Asic, Soc, Hardware Architecture, Debugging, Hardware, and Processors.
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