Joel Jones Email & Phone Number

Alameda, Ca, Us

Santa Clara , Ca, Us

Santa Clara, Ca, Us

Performed both team lead and individual contributor roles. Directed team with four direct reports and seven foreign contractors doing performance analysis and improvements through compiler and run-time changes for ARMv8 platform in LLVM, GCC, Java, HHVM, and LuaJIT.

San Jose, California, Us

Performance analysis and improvements through compiler and run-time changes for ARMv8 platform, in GCC, Java, and LLVM, particularly micro-architectural and atomic instruction support. Customer facing application porting and performance evaluation.

Cupertino, California, Us

General low-level compiler optimizations for ARMv8, X86, and other targets.

“First-in” member of a startup utilizing binary translation to introduce thread-level parallelism. Wrote translation from x86 to LLVM IR, integrated JIT code-gen for updating executables, wrote LLVM passes for inferring arrays, wrote LLVM transformations to inject code into executables, measured performance on un-instrumented executables, wrote LLVM code to inject software transactional memory calls.

Wrote checkers for finding defects in Java code, based on abstract interpretation of the bytecode. Performed deep competitive analysis. Assisted in before and after sales support, including customer visits.Tools, etc. used: Java, Eclipse, Ant, JUnit, XSLT, dom4j, xalan, Hudson, Scrum, DTDs, bash, BCEL.

Alameda, Ca, Us

Experienced with complete SDLC, drove 5.3.2 relase of compiler. Wrote instruction set simulator for PPC VLE. Lead development of C99 support. Discovered deficiencies in industry-standard test suite. Developed extensions to MIPS assembler to support DSP and multi-threading instructions. Implementing frameworks for unit and integration testing of compilers and linkers. Developing new cross-module optimization mechanisms. Performance measurement using Wind River Probe and OCD tools for PPC5566. Wrote mathematical analysis of math libraries.

Oakland, California, Us

Taught undergrad/grad programming languages class.

Tuscaloosa, Al, Us

I wrote Java code to verify quality of unit test code and check program source code for design flaws. I directed the production of several tools for implementing domain-specific languages and transform programming, using XML, XSLT, and Java. I led projects in improving lexer-generators and parser generators, extending them to do automatic AST generation and source-to-source translation. I directed the extension of GCC’s data-flow analyses to find security vulnerabilities. I used run-time code generation to improve the speed of marshaling. Directed development of a location-aware application delivery system in Java, with location finding and tailored content. Used Java servlets, J2ME, PHP, PostGIS database, raw network sockets, WebSphere Device Developer, etc. Designed, coded, and directed four other programmers in the writing of a wireless networked hand-held device law-enforcement form filling application, using C for Palm/OS and J2ME.

Urbana-Champaign, Chicago, And Springfield, Il, Us

While obtaining my Ph.D., I implemented many compiler features in Java and Smalltalk. My main work was in developing a Java compiler middle-end and back end single-handedly, including a just-in-time compiler for the SPARC. The middle end was implemented in Java, working on Java .class files as input. The middle-end included a control-flow graph builder, a Briggs-Chaitin graph-coloring register-allocator extended for prioritizing an infinite set of virtual registers, a Tarjan-Lengauer fast immediate dominators calculator, and a work list bit-vector data-flow solver for liveness and reaches. The back end, written in C, included a SPARC run-time code generator and a JVM bytecode verifier for the kaffe open source JVM. To support this effort, I developed a technique for structuring compiler analyses, and a test-suite for assuring low-level JVM functionality.In the Fall 1999 semester, I taught the undergrad/graduate introduction to databases class.

Houston, Texas, Us

I wrote a modulo scheduler compiler component in C++ for a VLIW architecture which was a predecessor to the IA-64, which used a region-based intermediate representation.

Cupertino, California, Us

I wrote a PowerPC code generator in C++ for a Dylan front-end and a kernel module audio driver for A/UX port of AIX.

Powell, Tennessee, Us

Phd, Computer Science

Ms, Computer Science

Ba, Computer Science